S9S08MP16E2MLF Freescale Semiconductor, S9S08MP16E2MLF Datasheet - Page 28

MCU 16K FLASH 20MHZ AUTO 48-LQFP

S9S08MP16E2MLF

Manufacturer Part Number
S9S08MP16E2MLF
Description
MCU 16K FLASH 20MHZ AUTO 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08MP16E2MLF

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
40
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x12b, D/A 3x5b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08MP
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI
Maximum Clock Frequency
51.34 MHz
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08MP16
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 13 Channel
On-chip Dac
3 DAC, 5 bit
Controller Family/series
HCS08
No. Of I/o's
40
Ram Memory Size
1KB
Cpu Speed
40MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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1
2
3
4
5
6
Num
Electrical Characteristics
Typical values are based on characterization data at V
This is the shortest pulse that is guaranteed to be recognized as a reset pin request.
To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time of t
above V
This is the minimum pulse width that is guaranteed to be recognized as a keyboard interrupt request in stop mode.
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or may not
be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
Timing is shown with respect to 20% V
2.14.2
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that can be used as the
optional external source to the FTM timer counter. These synchronizers operate from the current ICSOUT clock. The ICSOUT
clock period = 0.5 × t
28
7
8
C
D
C
LVD
No.
.
1
2
3
Keyboard interrupt pulse width
Port rise and fall time —
Low output drive (PTxDS = 0) (load = 50 pF)
Port rise and fall time —
High output drive (PTxDS = 1) (load = 50 pF)
Asynchronous path
Synchronous path
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
Slew rate control enabled (PTxSE = 1)
FTM Module Timing
Slew rate control disabled (PTxSE = 0)
C
D
D
D
cyc
RESET PIN
External clock frequency
External clock period
External clock high time
= 1/(f
Bus
5
4
× 2).
KBIxPn
KBIxPn
Rating
DD
Function
Table 16. Control Timing (continued)
and 80% V
MC9S08MP16 Series Data Sheet, Rev. 1
Table 17. FTM Input Timing
Figure 18. KBIxPn Timing
Figure 17. Reset Timing
DD
DD
6
levels. Temperature range –40°C to 125°C.
6
= 5.0V, 25°C unless otherwise stated.
t
t
IHIL
ILIH
Symbol
t
extrst
f
t
TCLK
TCLK
t
clkh
t
t
t
Symbol
ILIH,
Rise
Rise
, t
, t
t
IHIL
Fall
Fall
0.75
Min
0
2
1.5 x t
Min
100
cyc
f
ICSOUT
Max
Freescale Semiconductor
Typ
40
75
11
35
/4
1
1
MSH
Unit
t
t
Hz
cyc
cyc
Max
after V
DD
Unit
ns
ns
ns
rises

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