MC9S08DV96MLF Freescale Semiconductor, MC9S08DV96MLF Datasheet - Page 257
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MC9S08DV96MLF
Manufacturer Part Number
MC9S08DV96MLF
Description
MCU 8BIT 96K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08DV96MLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DV96MLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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12.3
This section describes in detail all the registers and register bits in the MSCAN module. Each description
includes a standard register diagram with an associated figure number. Details of register bit and field
function follow the register diagrams, in bit order. All bits of all registers in this module are completely
synchronous to internal clocks during a register read.
12.3.1
The CANCTL0 register provides various control bits of the MSCAN module as described below.
Read: Anytime
Write: Anytime when out of initialization mode; exceptions are read-only RXACT and SYNCH, RXFRM
(which is set by the module only), and INITRQ (which is also writable in initialization mode).
Freescale Semiconductor
Reset:
W
Register Definition
R
MSCAN Control Register 0 (CANCTL0)
TXCAN
RXFRM
CAN_H
The CANCTL0 register, except WUPE, INITRQ, and SLPRQ, is held in the
reset state when the initialization mode is active (INITRQ = 1 and
INITAK = 1). This register is writable again as soon as the initialization
mode is exited (INITRQ = 0 and INITAK = 0).
0
7
CAN node 1
CAN Controller
Transceiver
(MSCAN)
MCU
= Unimplemented
RXACT
Figure 12-4. MSCAN Control Register 0 (CANCTL0)
6
0
CAN_L
RXCAN
MC9S08DZ128 Series Data Sheet, Rev. 1
CSWAI
CAN Bus
Figure 12-3. CAN System
0
5
CAN node 2
NOTE
SYNCH
4
0
Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
TIME
0
3
CAN node n
WUPE
2
0
SLPRQ
0
1
INITRQ
0
1
257
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