MCF51AC128CVFUE Freescale Semiconductor, MCF51AC128CVFUE Datasheet - Page 8

• Manufacturer Part Number: MCF51AC128CVFUE
• Description: MCU 32BIT 128K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51ACr

Specifications of MCF51AC128CVFUE

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 20x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-QFP
• Cpu Family: MCF51AC
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 50.33MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 16KB
• # I/os (max): 54
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 20-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Processor Series: MCF51AC
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Maximum Clock Frequency: 50.33 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

MCF51AC256 Family Configurations
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Inter-integrated circuit (IIC)
— Compatible with IIC bus standard
— Multi-master operation
— Software programmable for one of 64 different serial clock frequencies
— Interrupt driven byte-by-byte data transfer
— Arbitration lost interrupt with automatic mode switching from master to slave
— Calling address identification interrupt
— Bus busy detection
— 10-bit address extension
Controller area network (CAN)
— Implementation of the CAN protocol — Version 2.0A/B
— Five receive buffers with FIFO storage scheme
— Three transmit buffers with internal prioritization using a “local priority” concept
— Flexible maskable identifier filter supports two full-size (32-bit) extended identifier filters, four
— Programmable wakeup functionality with integrated low-pass filter
— Programmable loopback mode supports self-test operation
— Programmable listen-only mode for monitoring of CAN bus
— Programmable bus-off recovery functionality
— Separate signalling and interrupt capabilities for all CAN receiver and transmitter error states
— Internal timer for time-stamping of received and transmitted messages
Serial communications interfaces (SCI)
— Full-duplex, standard non-return-to-zero (NRZ) format
— Double-buffered transmitter and receiver with separate enables
— Programmable baud rates (13-bit modulo divider)
— Interrupt-driven or polled operation
— Hardware parity generation and checking
— Programmable 8-bit or 9-bit character length
— Receiver wakeup by idle-line or address-mark
— Optional 13-bit break character generation / 11-bit break character detection
— Selectable transmitter output polarity
Serial peripheral interfaces (SPI)
— Master or slave mode operation
— Full-duplex or single-wire bidirectional option
— Programmable transmit bit rate
– Standard and extended data frames
– Zero to eight bytes data length
– Programmable bit rate up to 1 Mbps
– Support for remote frames
16-bit filters, or eight 8-bit filters
(warning, error passive, bus-off)
MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.6
Freescale Semiconductor