C8051F503-IQ Silicon Laboratories Inc, C8051F503-IQ Datasheet - Page 241
C8051F503-IQ
Manufacturer Part Number
C8051F503-IQ
Description
IC 8051 MCU 64K FLASH 32-QFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Datasheets
1.C8051F507-IM.pdf
(312 pages)
2.C8051F503-IM.pdf
(1 pages)
3.C8051F503-IM.pdf
(312 pages)
Specifications of C8051F503-IQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
32-QFP
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 25x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 32 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1527 - KIT DEV FOR C8051F50X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1516
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F503-IQ
Manufacturer:
WOLFSON
Quantity:
4 300
Company:
Part Number:
C8051F503-IQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F503-IQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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Values Read
1110
1100 0 0
1000 1
0
0 0
0 X A master START was gener-
0 X A master data byte was
0 A master data or address byte
1
Current SMbus State
ated.
was transmitted; NACK
received.
A master data or address byte
was transmitted; ACK
received.
received; ACK requested.
Table 23.4. SMBus Status Decoding
Rev. 1.1
Typical Response Options
Load slave address + R/W into
SMB0DAT.
Set STA to restart transfer.
Abort transfer.
Load next data byte into
SMB0DAT.
End transfer with STOP.
End transfer with STOP and start
another transfer.
Send repeated START.
Switch to Master Receiver Mode
(clear SI without writing new data
to SMB0DAT).
Acknowledge received byte;
Read SMB0DAT.
Send NACK to indicate last byte,
and send STOP.
Send NACK to indicate last byte,
and send STOP followed by
START.
Send ACK followed by repeated
START.
Send NACK to indicate last byte,
and send repeated START.
Send ACK and switch to Master
Transmitter Mode (write to
SMB0DAT before clearing SI).
Send NACK and switch to Mas-
ter Transmitter Mode (write to
SMB0DAT before clearing SI).
C8051F50x-F51x
Values to
Write
0
1
0
0
0
1
1 0 X
0
0
0
1
1
1
0 0 1
0 0 0
0 X 1100
0 X
1 X
0 X 1100
1 X
1 X
0 X 1000
0 1
1 0
1 0
0 1
0 0
1000
1100
1100
1110
1110
1110
1110
1110
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241
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