MC908AP32ACFBER Freescale Semiconductor, MC908AP32ACFBER Datasheet - Page 281

• Manufacturer Part Number: MC908AP32ACFBER
• Description: IC MCU 32K FLASH 8MHZ 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP32ACFBER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Processor Series: HC08AP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908AP64E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Chapter 19
Computer Operating Properly (COP)
19.1 Introduction
The computer operating properly (COP) module contains a free-running counter that generates a reset if
allowed to overflow. The COP module helps software recover from runaway code. Prevent a COP reset
by clearing the COP counter periodically. The COP module can be disabled through the COPD bit in the
configuration register 1 (CONFIG1).
19.2 Functional Description
Figure 19-1
The COP counter is a free-running 6-bit counter preceded by the 12-bit SIM counter. If not cleared by
software, the COP counter overflows and generates an asynchronous reset after 262,128 or 8176 ICLK
cycles, depending on the state of the COP rate select bit, COPRS, in the CONFIG1 register. With a
8176 ICLK cycle overflow option, a 88-kHz ICLK gives a COP timeout period of ~93ms. Writing any value
to location $FFFF before an overflow occurs prevents a COP reset by clearing the COP counter and
stages 12 through 5 of the SIM counter.
Freescale Semiconductor
INTERNAL RESET SOURCES
(COPRS FROM CONFIG1)
(COPD FROM CONFIG1)
RESET VECTOR FETCH
STOP INSTRUCTION
shows the structure of the COP module.
COPEN (FROM SIM)
COPCTL WRITE
COPCTL WRITE
COP RATE SEL
COP DISABLE
RESET
ICLK
MC68HC908AP A-Family Data Sheet, Rev. 3
Figure 19-1. COP Block Diagram
12-BIT COP PRESCALER
COP CLOCK
COP COUNTER
6-BIT COP COUNTER
CLEAR
RESET STATUS REGISTER
RESET CIRCUIT
281