MC9S08JM60CLD Freescale Semiconductor, MC9S08JM60CLD Datasheet - Page 331

• Manufacturer Part Number: MC9S08JM60CLD
• Description: IC MCU 8BIT 60K FLASH 44-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08JM60CLD

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SCI, SPI, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: S08JM
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 12-bit
• Package: 44LQFP
• Family Name: HCS08
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: DEMOJM - KIT DEMO FOR JM MCU FAMILYDEMOJMSKT - BOARD DEMO S08JM CARD W/SOCKET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 18-2
The host is asynchronous to the target so there is a 0-to-1 cycle delay from the host-generated falling edge
to where the target perceives the beginning of the bit time. Ten target BDC clock cycles later, the target
senses the bit level on the BKGD pin. Typically, the host actively drives the pseudo-open-drain BKGD pin
during host-to-target transmissions to speed up rising edges. Because the target does not drive the BKGD
pin during the host-to-target transmission period, there is no need to treat the line as an open-drain signal
during this period.
Freescale Semiconductor
SYNCHRONIZATION
PERCEIVED START
(TARGET MCU)
BDC CLOCK
UNCERTAINTY
TRANSMIT 1
TRANSMIT 0
OF BIT TIME
HOST
HOST
shows an external host transmitting a logic 1 or 0 to the BKGD pin of a target HCS08 MCU.
Figure 18-2. BDC Host-to-Target Serial Bit Timing
MC9S08JM60 Series Data Sheet, Rev. 3
TARGET SENSES BIT LEVEL
10 CYCLES
EARLIEST START
OF NEXT BIT
Development Support
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