R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 628

• Manufacturer Part Number: R5F21346CNFP#U0
• Description: MCU 1KB FLASH 32K ROM 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/34Cr

Specifications of R5F21346CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 43
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 595 of 723
28.3.3.3
28.3.3.4
This trigger is selected when bits ADCAP1 to ADCAP0 in the ADMOD register are set to 10b (timer RC).
To use this function, make sure the following conditions are met.
•
•
•
•
When the IMFj bit in the TRCSR register is changed from 0 to 1, A/D conversion starts.
Refer to 19. Timer RC, 19.5 Timer Mode (Output Compare Function), 19.6 PWM Mode, 19.7 PWM2
Mode for the details of timer RC and the output compare function (timer mode, PWM mode, and PWM2
mode).
This trigger is selected when bits ADCAP1 to ADCAP0 in the ADMOD register are set to 11b (external trigger
(ADTRG)).
To use this function, make sure the following conditions are met.
•
•
•
•
•
The IR bit in the INT0IC register is set to 1 (interrupt requested) in accordance with the setting of the POL bit in
the INT0IC register and the INT0PL bit in the INTEN register and a change in the ADTRG pin input (refer to
11.8 Notes on Interrupts).
For details on interrupts, refer to 11. Interrupts.
When the ADTRG pin input is changed from “H” to “L” under the above conditions, A/D conversion starts.
Bits ADCAP1 to ADCAP0 in the ADMOD register are set to 10b (timer RC).
Timer RC is used in the output compare function (timer mode, PWM mode, PWM2 mode).
The ADTRGjE bit (j = A, B, C, D) in the TRCADCR register is set to 1 (A/D trigger occurs at compare match
with TRCGRj register).
The ADST bit in the ADCON0 register is set to 1 (A/D conversion starts).
Bits ADCAP1 to ADCAP0 in the ADMOD register are set to 11b (external trigger (ADTRG)).
Set the INT0EN bit in the INTEN register to 1 (INT0 input enabled) and the INT0PL bit to 0 (one edge), and
set the POL bit in the INT0IC register to 0 (falling edge selected).
Set the PD4_5 bit in the PD4 register to 0 (input mode).
Select the INT0 digital filter by bits INT0F1 to INT0F0 in the INTF register.
The ADST bit in the ADCON0 register is set to 1 (A/D conversion starts).
Trigger from Timer RC
External Trigger
28. A/D Converter