R5F21257SNFP#U0 Renesas Electronics America, R5F21257SNFP#U0 Datasheet - Page 57

• Manufacturer Part Number: R5F21257SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21257SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
0.30
0.40
REVISION HISTORY
Sep 01, 2005
Jan 24, 2006
Date
all pages • “Preliminary” deleted
22 to 44 5. Electrical Characteristics added
Page
19
20
21
10
12
13
14
2
3
4
5
6
7
8
9
Tabel 4.5 SFR Information(5) revised:
• 0118h : Timer RE Second Data Register/Counter Register →
Tabel 4.6 SFR Information(6) revised:
• 0145h
• 0146h, 0147h
• 0148h, 0149h
• 014Ah, 014Bh
• 014Ch, 014Dh
• 014Eh, 014Fh
• 0155h
• 0156h, 0157h
• 0158h, 0159h
• 015Ah, 015Bh
• 015Ch, 015Dh
• 015Eh, 015Fh
Tabel 4.7 SFR Information(7) revised:
• 01B5h: 01000101b → 1000000Xb
• 01B7h: XX000001b → 00000001b
• FFFFh: (Note 2) added
• Symbol name “TRDMDR” → “TRDMR”, “SSUAIC” → “SSUIC”, and
• Pin name “TCLK” → “TRDCLK” revised
Table 1.1 Functions and Specifications for R8C/24 Group revised
Table 1.2 Functions and Specifications for R8C/25 Group revised
Figure 1.1 Block Diagram;
Table 1.3 Product Information for R8C/24 Group revised
Table 1.4 Product Information for R8C/25 Group revised
Figure 1.4 Pin Assignments (Top View) “TCLK” → “TRDCLK” revised
Table 1.5 Pin Functions “TCLK” → “TRDCLK” revised
Table 1.6 Pin Name Information by Pin Number;
Figure 2.1 CPU Registers;
2.8.10 Reserved Area;
Figure 3.1 Memory Map of R8C/24 Group;
3.2 R8C/25 Group, Figure 3.2 Memory Map of R8C/25 Group;
“IIC2AIC” → “IICIC” revised
“Peripheral Functions” added,
“System Clock Generation” → “System Clock Generator” revised
“Reserved Area” → “Reserved Bit” revised
“Reserved Area” → “Reserved bit” revised
“Program area” → “program ROM” revised
“Data area” → “data flash”, “Program area” → “program ROM” revised
“TCLK” → “TRDCLK” revised
Timer RE Second Data Register/Counter Data Register
R8C/24 Group, R8C/25 Group Datasheet
A - 4
POCR0
TRDCNT0 →
GRA0
GRB0
GRC0
GRD0
POCR1
TRDCNT1 →
GRA1
GRB1
GRC1
GRD1
Description
Summary
→
→
→
→
→
→
→
→
→
→
TRDPOCR0
TRD0
TRDGRA0
TRDGRB0
TRDGRC0
TRDGRD0
TRDPOCR1
TRD1
TRDGRA1
TRDGRB1
TRDGRC1
TRDGRD1