MCF51EM128CLL Freescale Semiconductor, MCF51EM128CLL Datasheet - Page 41
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MCF51EM128CLL
Manufacturer Part Number
MCF51EM128CLL
Description
IC MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets
1.MCF51EM128CLL.pdf
(2 pages)
2.MCF51EM128CLL.pdf
(54 pages)
3.MCF51EM128CLL.pdf
(636 pages)
Specifications of MCF51EM128CLL
Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
63
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF51EM128CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
1
2
3
Num
The performance of SPI2 depends on the configuration of power supply of the LCD pins. When the LCD pins
are configured with full complementary drive enabled (FCDEN = 1, VSUPPLY = 11 and RVEN = 0), and VLL3
is driven with external VDD, the SPI2 can operate at the max performance as the above table. When the internal
LCD charge pump is used to power the LCD pins, the SPI2 is configured with open-drain outputs. Its
performance depends on the value of the external pullup resistor implemented, and the max operating
frequency must be limited to 1 MHz.
SPI3 has open-drain outputs and its performance depends on the value of the external pullup resistor
implemented.
Refer to
10
11
12
13
1
2
3
4
5
6
7
8
9
3
Figure 19
C
D
D
D
D
D
D
D
D
D
D
D
D
D
Operating frequency
SPSCK period
Enable lead time
Enable lag time
Clock (SPSCK) high or low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time
Slave MISO disable time
Data valid (after SPSCK edge)
Data hold time (outputs)
Rise time
Fall time
through
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.3
Characteristic
Figure
Preliminary—Subject to Change Without Notice
Table 22. SPI Electrical Characteristic
5
22.
6
4
Master
Master
Master
Master
Master
Master
Master
Master
Master
Output
Output
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Input
Input
t
Symbol
WSPSCK
t
SPSCK
t
t
Lead
t
t
t
t
f
t
t
Lag
t
t
HO
RO
FO
t
dis
t
op
SI
HI
RI
FI
a
v
f
t
Bus
cyc
Min
1/2
1/2
—
—
15
15
25
—
—
—
—
—
—
—
—
/2048
0
2
4
0
0
0
– 30
1,2
1024 t
t
t
cyc
cyc
f
f
2048
—25
—25
Bus
Bus
Max
25
25
—
—
—
—
—
—
—
—
—
—
—
—
1
1
– 25
– 25
/2
/4
Electrical Characteristics
cyc
t
t
SPSCK
SPSCK
Unit
t
t
t
t
t
Hz
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
cyc
cyc
cyc
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