MCF5270VM100J Freescale Semiconductor, MCF5270VM100J Datasheet - Page 92
MCF5270VM100J
Manufacturer Part Number
MCF5270VM100J
Description
IC MCU 166MHZ 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5270VM100J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
61
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5270VM100J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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ColdFire Core
3.13 Branch Instruction Execution Times
3.14 ColdFire Instruction Set Architecture Enhancements
This section describes the new opcodes implemented as part of the Revision A+ enhancements to
the basic ColdFire ISA.
3-26
Opcod
jmp
bsr
rte
jsr
rts
e
<EA>
<ea>
<ea>
The execution times for moving the contents of the Racc,
Raccext[01,23], MACSR, or Rmask into a destination location <ea>x
shown in this table represent the best-case scenario when the store
instruction is executed and there are no load or M{S}AC instructions
in the EMAC execution pipeline. In general, these store operations
require only a single cycle for execution, but if preceded immediately
by a load, MAC, or MSAC instruction, the depth of the EMAC
pipeline is exposed and the execution time is four cycles.
Table 3-19. General Branch Instruction Execution Times
Opcode
Rn
bra
bcc
—
—
—
—
—
Table 3-20. BRA, Bcc Instruction Execution Times
3(0/1)
3(0/0)
(An)
—
—
—
Forward
Taken
2(0/0)
3(0/0)
MCF5271 Reference Manual, Rev. 2
10(2/0)
5(1/0)
(An)+
—
—
—
Not Taken
Forward
1(0/0)
NOTE
—
-(An)
Effective Address
—
—
—
—
—
(d16,An)
(d16,PC)
Backward
3(0/1)
3(0/0)
3(0/1)
Taken
2(0/0)
2(0/0)
—
—
(d8,PC,Xi*SF)
(d8,An,Xi*SF)
4(0/0)
4(0/1)
—
—
—
Backward
Not Taken
3(0/0)
—
Freescale Semiconductor
xxx.wl
3(0/0)
3(0/1)
—
—
—
#xxx
—
—
—
—
—
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