M30262F8GP#U3 Renesas Electronics America, M30262F8GP#U3 Datasheet - Page 205
M30262F8GP#U3
Manufacturer Part Number
M30262F8GP#U3
Description
IC M16C/TINY MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M30262F4GPU3.pdf
(41 pages)
3.M30262F4GPU3.pdf
(241 pages)
Specifications of M30262F8GP#U3
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
M30262F8GP#U3M30262F8GP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
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CPU Rewrite Mode (Flash Memory Version)
Figure 1.20.3. Program flowchart
Program Command (40
Program operation starts when the command code “40
address and data to program are written in the 2nd bus cycle, program operation (data programming
and verification) will start. Make an address in the first bus cycle same as an address to program by
the second bus cycle.
Whether the write operation is completed can be confirmed by reading the status register or the RY/
BY status flag. When the program starts, the read status register mode is accessed automatically and
the content of the status register is read into the data bus (D0 - D7). The status register bit 7 (SR7) is
set to 0 at the same time the write operation starts and is returned to 1 upon completion of the write
operation. In this case, the read status register mode remains active until the Read Array command
(FF
The RY/BY status flag is 0 during write operation and 1 when the write operation is completed as is
the status register bit 7.
At program end, program results can be checked by reading the status register.
Figure 1.20.3 shows an example of a program flowchart.
Each block of the flash memory can be write protected by using a lock bit. For details, refer to the
section where the data protect function is detailed.
Additional writes to the already programmed pages are prohibited.
Do a command to use in right after of program command as follows
Make an address in the first bus cycle same as an address to program by the second bus cycle of
program command.
16
) is written.
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Write data to target
Status register
completed
address
RY/BY=1?
Write
SR4=0?
Program
SR7=1?
Start
16
read
or
)
YES
YES
40
16
Renesas Technology Corp.
NO
NO
Program
(Set an address to even address in the
(Set an address to even address in the user
error
user ROM area when write 40
ROM area when reading the status register)
16
” is written in the first bus cycle. Then, if the
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
)
M16C/26 Group
197
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