MCF5213LCVM80J Freescale Semiconductor, MCF5213LCVM80J Datasheet - Page 7
MCF5213LCVM80J
Manufacturer Part Number
MCF5213LCVM80J
Description
IC MCU 256K FLASH 80MHZ 81MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet
1.MCF5213CAF80.pdf
(54 pages)
Specifications of MCF5213LCVM80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
81-MAPBGA
Processor Series
MCF521x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5213LCVM80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
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— Programmable period and duty cycle
— Programmable enable/disable for each channel
— Software selectable polarity for each channel
— Period and duty cycle are double buffered. Change takes effect when the end of the current period is reached
— Programmable center or left aligned outputs on individual channels
— Four clock sources (A, B, SA, and SB) provide for a wide range of frequencies
— Emergency shutdown
Two periodic interrupt timers (PITs)
— 16-bit counter
— Selectable as free running or count down
Software watchdog timer
— 32-bit counter
— Low-power mode support
Clock generation features
— One to 10 MHz crystal, 8 MHz on-chip trimmed relaxation oscillator, or external oscillator reference options
— Two to 10 MHz reference frequency for normal PLL mode
— System can be clocked from PLL or directly from crystal oscillator or relaxation oscillator
— Low power modes supported
— 2
Interrupt controller
— Uniquely programmable vectors for all interrupt sources
— Fully programmable level and priority for all peripheral interrupt sources
— Seven external interrupt signals with fixed level and priority
— Unique vector number for each interrupt source
— Ability to mask any individual interrupt source or all interrupt sources (global mask-all)
— Support for hardware and software interrupt acknowledge (IACK) cycles
— Combinatorial path to provide wake-up from low-power modes
DMA controller
— Four fully programmable channels
— Dual-address transfer support with 8-, 16-, and 32-bit data capability, along with support for 16-byte (4×32-bit)
— Source/destination address pointers that can increment or remain constant
— 24-bit byte transfer counter per channel
— Auto-alignment transfers supported for efficient block movement
— Bursting and cycle-steal support
— Software-programmable DMA requests for the UARTs (3) and 32-bit timers (4)
Reset
— Separate reset in and reset out signals
— Seven sources of reset:
(PWM counter reaches zero) or when the channel is disabled.
burst transfers
– Power-on reset (POR)
– External
– Software
– Watchdog
– Loss of clock
n
(n ≤ 0 ≤ 15) low-power divider for extremely low frequency operation
MCF5213 ColdFire Microcontroller, Rev. 4
Family Configurations
7