R5F2L3AAANFP#U1 Renesas Electronics America, R5F2L3AAANFP#U1 Datasheet - Page 487

• Manufacturer Part Number: R5F2L3AAANFP#U1
• Description: MCU FLASH 96+4KB 100LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/Lx/3AAr

Specifications of R5F2L3AAANFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: LCD, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 88
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 450 of 802
22.2.5
Notes:
Table 22.3
Note:
Bit Symbol
1. The results of writing to these bits are as follows:
2. When setting bits IMFA, IMFB, UDF, or OVF to 0, use the MOV instruction to ensure that only the specified bits
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
1. Edge selected by bits IOj0 and IOj1 (j = A or B) in the TRGIOR register.
IMFB
IMFA
UDF
OVF
Address 0174h
• The bit is set to 0 when it is first read as 1 and then 0 is written to it.
• The bit remains unchanged even if it is first read as 0 and then 0 is written to it because its previous value is
• The bit’s value remains unchanged if 1 is written to it.
are written to 0 and the other bits are written to 1. Write 0Fh to this register immediately after writing to these bits.
Do not generate an interrupt or a DTC transfer until 0Fh is written.
When reading the TRGSR register after writing to it, insert one or more NOP instructions between the
instructions used for writing and reading.
Symbol
retained. (The bit’s value remains 1 even if it is set to 1 from 0 after being read as 0 and having 0 written to it
because its previous value is retained.)
Bit
Symbol
IMFA
IMFB
DIRF
Timer RG Status Register (TRGSR)
UDF
OVF
—
—
—
TRGIOA pin input edge
TRGIOB pin input edge
When the TRG register underflows.
When the TRG register overflows.
Conditions for Setting Bit of Each Flag to 1
Input Capture Function
b7
—
1
Input-capture/compare-match
flag A
Input-capture/compare-match
flag B
Underflow flag
Overflow flag
Count direction flag
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
b6
—
1
Oct 30, 2009
Bit Name
Timer Mode
(1)
(1)
b5
—
1
When the values of registers TRG and TRGGRA match.
When the values of registers TRG and TRGGRB match.
Output Compare Function
DIRF
b4
0
[Condition for setting to 0]
Write 0 after reading.
[Condition for setting to 1]
Refer to Table 22.3 Conditions for Setting Bit of Each
Flag to 1 .
0: TRG register is decremented
1: TRG register is incremented
OVF
b3
0
UDF
b2
0
(1, 2)
Function
IMFB
b1
0
PWM Mode
IMFA
b0
0
22. Timer RG
R/W
R/W
R/W
R/W
R/W
—
R