MCF5271CVM100J Freescale Semiconductor, MCF5271CVM100J Datasheet - Page 7
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MCF5271CVM100J
Manufacturer Part Number
MCF5271CVM100J
Description
IC MCU 166MHZ 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5271CVM100J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
61
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
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3.7.3
3.7.4
3.7.5
3.7.6
3.7.7
3.7.8
3.7.9
3.7.10
3.7.11
3.7.12
3.7.13
3.7.14
3.8
3.8.1
3.8.2
3.9
3.10
3.11
3.12
3.13
3.14
4.1
4.2
4.3
4.4
4.4.1
4.4.1.1
4.4.2
4.5
4.5.1
4.5.2
4.5.3
Freescale Semiconductor
Paragraph
Number
Instruction Execution Timing ....................................................................................... 3-19
Standard One Operand Instruction Execution Times ................................................... 3-21
Standard Two Operand Instruction Execution Times................................................... 3-22
Miscellaneous Instruction Execution Times................................................................. 3-24
EMAC Instruction Execution Times ............................................................................ 3-25
Branch Instruction Execution Times ............................................................................ 3-26
ColdFire Instruction Set Architecture Enhancements .................................................. 3-26
Multiply-Accumulate Unit.............................................................................................. 4-1
Introduction to the MAC................................................................................................. 4-2
General Operation........................................................................................................... 4-3
Memory Map/Register Definition .................................................................................. 4-6
EMAC Instruction Set Summary .................................................................................. 4-12
Illegal Instruction Exception..................................................................................... 3-13
Divide-By-Zero......................................................................................................... 3-14
Privilege Violation.................................................................................................... 3-14
Trace Exception ........................................................................................................ 3-14
Unimplemented Line-A Opcode............................................................................... 3-15
Unimplemented Line-F Opcode ............................................................................... 3-15
Debug Interrupt......................................................................................................... 3-15
RTE and Format Error Exception............................................................................. 3-15
TRAP Instruction Exception..................................................................................... 3-15
Interrupt Exception ................................................................................................... 3-15
Fault-on-Fault Halt ................................................................................................... 3-16
Reset Exception ........................................................................................................ 3-16
Timing Assumptions................................................................................................. 3-19
MOVE Instruction Execution Times ........................................................................ 3-20
MAC Status Register (MACSR)................................................................................. 4-6
Mask Register (MASK) ............................................................................................ 4-11
EMAC Instruction Execution Times ........................................................................ 4-13
Data Representation.................................................................................................. 4-14
MAC Opcodes .......................................................................................................... 4-14
Fractional Operation Mode..................................................................................... 4-9
Enhanced Multiply-Accumulate Unit (EMAC)
MCF5271 Reference Manual, Rev. 2
Contents
Chapter 4
Title
Number
Page
vii
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