C8051F062-GQR Silicon Laboratories Inc, C8051F062-GQR Datasheet - Page 203

• Manufacturer Part Number: C8051F062-GQR
• Description: IC 8051 MCU 64K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F062-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 59
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: 336-1214 - DEV KIT FOR F060/F062/F063
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

18.
The C8051F06x family of devices are fully integrated mixed-signal System on a Chip MCUs with 59 digital
I/O pins (C8051F060/2/4/6) or 24 digital I/O pins (C8051F061/3/5/7), organized as 8-bit Ports. All ports are
both bit- and byte-addressable through their corresponding Port Data registers. All Port pins support con-
figurable Open-Drain or Push-Pull output modes and weak pull-ups. Additionally, Port 0 pins are 5 V-toler-
ant. A block diagram of the Port I/O cell is shown in Figure 18.1. Complete Electrical Specifications for the
Port I/O pins are given in Table 18.1.
VDD = 2.7 to 3.6 V, -40 to +85 °C unless otherwise specified.
Parameter
Output High Voltage
(V
Output Low Voltage
(V
Input High Voltage (VIH)
Input Low Voltage (VIL)
Input Leakage Current
Input Capacitance
OH
OL
PORT-INPUT
/WEAK-PULLUP
PUSH-PULL
/PORT-OUTENABLE
PORT-OUTPUT
ANALOG INPUT
)
)
Port Input/Output
Analog Select
(Port 1 and 2 Only)
Conditions
I
I
I
I
DGND < Port Pin < VDD, Pin Tri-state
Weak Pull-up Off
Weak Pull-up On
Table 18.1. Port I/O DC Electrical Characteristics
OH
OH
OL
OL
= 8.5 mA
= 10 µA
= -3 mA, Port I/O Push-Pull
= -10 µA, Port I/O Push-Pull
Figure 18.1. Port I/O Cell Block Diagram
Rev. 1.2
C8051F060/1/2/3/4/5/6/7
DGND
0.7 x VDD
VDD
VDD - 0.7
VDD - 0.1
Min
Typ
VDD
10
5
(WEAK)
0.3 x VDD
Max
0.6
0.1
± 1
PORT
PAD
Units
µA
µA
pF
V
V
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