DF36034HJ Renesas Electronics America, DF36034HJ Datasheet - Page 349

• Manufacturer Part Number: DF36034HJ
• Description: MCU 3/5V 32K J-TEMP 64=QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36034HJ

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F36034HJ; HD64F36034HJ

15.3.15 Mailbox Interrupt Mask Register (MBIMR)
MBIMR controls enabling or disabling of individual Mailbox interrupt requests. Setting and
clearing each status flag has nothing to do with the configuration of bits in MBIMR.
15.3.16 TinyCAN Interrupt Mask Registers 0, 1 (TCIMR0, TCIMR1)
TCIMR controls enabling or disabling of TCIRR interrupt requests. When the corresponding bit is
set to 1, the interrupt request is masked. This register corresponds to TCIRR.
Bit
7 to 4
3
2
1
0
Bit
7
TCIMR0
Bit Name
—
MB3
MB2
MB1
MB0
Bit Name
OVLIM
Initial
Value
All 1
1
1
1
1
Initial
Value
1
R/W
—
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 1.
These flags enable or disable individual Mailbox interrupt
requests.
The interrupt source in a transmit Mailbox is clearing of
the corresponding bit in TXPR caused by transmission
end or transmission cancellation. The interrupt source in
a receive Mailbox is setting of the corresponding bit in
RXPR or RFPR caused by reception end.
0: An interrupt request in the corresponding Mailbox is
1: An interrupt request in the corresponding Mailbox is
Description
Overload Frame Transmit Interrupt Mask
Enables or disables an interrupt request for overload
frame transmission.
0: The interrupt request for the overload frame
1: The interrupt request for the overload frame
enabled
disabled
transmission is enabled
transmission is disabled
Section 15 Controller Area Network for Tiny (TinyCAN)
Rev. 4.00 Mar. 15, 2006 Page 315 of 556
REJ09B0026-0400