D13002X16V Renesas Electronics America, D13002X16V Datasheet - Page 403
D13002X16V
Manufacturer Part Number
D13002X16V
Description
MCU 3/5V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13002F16V.pdf
(702 pages)
Specifications of D13002X16V
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D13002X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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11.2.7 Next Data Enable Register A (NDERA)
NDERA is an 8-bit readable/writable register that enables or disables TPC output groups 1 and 0
(TP
If a bit is enabled for TPC output by NDERA, then when the ITU compare match event selected
in the TPC output control register (TPCR) occurs, the NDRA value is automatically transferred to
the corresponding PADR bit, updating the output value. If TPC output is disabled, the bit value is
not transferred from NDRA to PADR and the output value does not change.
NDERA is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 0—Next Data Enable 7 to 0 (NDER7 to NDER0): These bits enable or disable TPC
output groups 1 and 0 (TP
Bits 7 to 0
NDER7 to NDER0
0
1
Bit
Initial value
Read/Write
7
to TP
0
) on a bit-by-bit basis.
NDER7
R/W
7
0
Description
TPC outputs TP
(NDR7 to NDR0 are not transferred to PA
TPC outputs TP
(NDR7 to NDR0 are transferred to PA
7
to TP
NDER6
R/W
6
0
0
) on a bit-by-bit basis.
NDER5
R/W
7
7
5
0
to TP
to TP
Next data enable 7 to 0
These bits enable or disable
TPC output groups 1 and 0
387
0
0
NDER4
R/W
are disabled
are enabled
4
0
NDER3
R/W
3
0
7
to PA
7
NDER2
to PA
0
R/W
)
2
0
0
)
NDER1
R/W
1
0
(Initial value)
NDER0
R/W
0
0
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