M30281FCHP#U3B Renesas Electronics America, M30281FCHP#U3B Datasheet - Page 316

IC M16C/28 MCU FLASH 64-LQFP

M30281FCHP#U3B

Manufacturer Part Number
M30281FCHP#U3B
Description
IC M16C/28 MCU FLASH 64-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30281FCHP#U3B

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
55
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
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E
1
Figure 17.12 Digital Debounce Filter
. v
J
6
0
C
2
9
2 /
0 .
B
Example of INT5 Digital Debounce Function (if P17DDR = "03
1. (Condition after reset). P17DDR=FF
2. Set the P17DDR register to "03
3. The P17DDR register will stops counting when the pin input level and the signal output level are matched (e.g., both levels are "H") while
4. If the pin input level (e.g.,"L") and the signal output level (e.g.,"H") are not matched the P17DDR register will start decrement again after the
5. When the P17DDR register is underflow, it stops counting and the signal output will output the same as pin input level (e.g."L").
6. If the pin input level (e.g.,"H") and the signal output level (e.g., "L") are not matched again, the P17DDR register will start decrement again
7. When the P17DDR register is underflow, it stops counting and the signal output will output the same as pin input level (e.g."H").
8. If the pin input level (e.g.,"H") and the signal output level (e.g., "L") are not matched again, the P17DDR register will start decrement again
9. Set the P17DDR register to "FF
f
Reload Value
Port In
Signal Out
Count Value
Reload Value
Port In
Signal Out
Count Value
8
0
0
8
Data Bus
(continued)
(continued)
(continued)
(continued)
and the signal output level (e.g.,"H") are not matched.
counting.
setting value is reloaded.
after the setting value is reloaded.
after the setting value is reloaded.
directly.
0
G
4
J
7
a
o r
P1
0 -
. n
f
u
8
7
2
3
p
0
, 1
0
(
M
2
0
1
Clock
Port In
Reload Value
0
6
7
C
FF
Digital Debounce Filter
1
(write)
2 /
FF
03
FF
page 294
, 8
6
M
03
1
16
16
6
". The P17DDR register starts decrement along the f8 as a counter source, if the pin input level (e.g.,"L")
". The P17DDR register starts counting after the setting value is reloaded. Pin input signal will be output
C
16
02
2 /
f o
. Pin input signal will be output directly.
8
3
Count Value
) B
8
Signal Out
01
5
03
2
(read)
03
00
7
02
16
FF
")
To INT5
Data Bus
01
3
8
03
02
4
9
03
FF
FF
02
01
00
17. Programmable I/O Ports
5
FF

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