R4F24569NVFQV Renesas Electronics America, R4F24569NVFQV Datasheet - Page 970
![MCU 256KB FLASH 64K 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R4F24569NVFQV
Manufacturer Part Number
R4F24569NVFQV
Description
MCU 256KB FLASH 64K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24569NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
R4F24569NVFQV
Manufacturer:
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R4F24569NVFQV
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Section 15 Serial Communication Interface (SCI, IrDA)
15.9.2
Table 15.14 shows the interrupt sources in Smart Card interface mode. The transmit end interrupt
(TEI) request cannot be used in this mode.
Table 15.14 Interrupt Sources
In Smart Card interface mode, as in normal serial communication interface mode, transfer can be
carried out using the DTC or DMAC. In transmit operations, the TDRE flag is also set to 1 at the
same time as the TEND flag in SSR, and a TXI interrupt is generated. If the TXI request is
designated beforehand as a DTC or DMAC activation source, the DTC or DMAC will be
activated by the TXI request, and transfer of the transmit data will be carried out. The TDRE and
TEND flags are automatically cleared to 0 when data transfer is performed by the DTC or DMAC.
In the event of an error, the SCI retransmits the same data automatically. During this period, the
TEND flag remains cleared to 0 and the DTC or DMAC is not activated. Therefore, the SCI and
DTC or DMAC will automatically transmit the specified number of bytes in the event of an error,
including retransmission. However, the ERS flag is not cleared automatically when an error
occurs, and so the RIE bit should be set to 1 beforehand so that an ERI request will be generated in
the event of an error, and the ERS flag will be cleared.
Page 940 of 1392
Channel
0
1
2
3
4
Interrupts in Smart Card Interface Mode
Name
ERI0
RXI0
TXI0
ERI1
RXI1
TXI1
ERI2
RXI2
TXI2
ERI3
RXI3
TXI3
ERI4
RXI4
TXI4
Interrupt Source
Receive Error, detection
Receive Data Full
Transmit Data Empty
Receive Error, detection
Receive Data Full
Transmit Data Empty
Receive Error, detection
Receive Data Full
Transmit Data Empty
Receive Error, detection
Receive Data Full
Transmit Data Empty
Receive Error, detection
Receive Data Full
Transmit Data Empty
Interrupt Flag
ORER, PER, ERS
RDRF
TEND
ORER, PER, ERS
RDRF
TEND
ORER, PER, ERS
RDRF
TEND
ORER, PER, ERS
RDRF
TEND
ORER, PER, ERS
RDRF
TEND
DTC
Activation
Not possible
Possible
Possible
Not possible
Possible
Possible
Not possible
Possible
Possible
Not possible
Possible
Possible
Not possible
Possible
Possible
H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
DMAC
Activation
Not possible
Possible
Possible
Not possible
Possible
Possible
Not possible
Not possible
Not possible
Not possible
Not possible
Not possible
Not possible
Not possible
Not possible
Jul 07, 2010
Priority
High
Low
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