R4F24568NVRFQV Renesas Electronics America, R4F24568NVRFQV Datasheet - Page 778
![MCU 256KB FLASH 48K 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R4F24568NVRFQV
Manufacturer Part Number
R4F24568NVRFQV
Description
MCU 256KB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVRFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Company:
Part Number:
R4F24568NVRFQV
Manufacturer:
Renesas Electronics America
Quantity:
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R4F24568NVRFQV
Manufacturer:
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Quantity:
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Section 11 16-Bit Timer Pulse Unit (TPU)
(3)
The TCNT value can be transferred to TGR on detection of the TIOC pin input edge.
Rising edge, falling edge, or both edges can be selected as the detection edge. For channels 0, 1, 3,
4, 6, 7, 9, and 10 it is also possible to specify another channel’s counter input clock or compare
match signal as the input capture source.
Note: When another channel’s counter input clock is used as the input capture input for channels
(a)
Figure 11.9 shows an example of the setting procedure for input capture operation.
Page 748 of 1392
Input Capture Function
Example of setting procedure for input capture operation
<Input capture operation>
Select input capture input
0, 3, 6, and 9, φ/1 should not be selected as the counter input clock used for input capture
input. Input capture will not be generated if φ/1 is selected.
Figure 11.9 Example of Setting Procedure for Input Capture Operation
Input selection
Start count
[1]
[2]
[1] Designate TGR as an input capture register by
[2] Set the CST bit in TSTR to 1 to start the count
means of TIOR, and select the input capture
source and input signal edge (rising edge, falling
edge, or both edges).
operation.
H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
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