COP8CCR9IMT7/NOPB National Semiconductor, COP8CCR9IMT7/NOPB Datasheet - Page 38

IC MCU EEPROM 8BIT 32K 48-TSSOP

COP8CCR9IMT7/NOPB

Manufacturer Part Number
COP8CCR9IMT7/NOPB
Description
IC MCU EEPROM 8BIT 32K 48-TSSOP
Manufacturer
National Semiconductor
Series
COP8™ 8Cr
Datasheet

Specifications of COP8CCR9IMT7/NOPB

Core Processor
COP8
Core Size
8-Bit
Speed
20MHz
Connectivity
Microwire/Plus (SPI), UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-TSSOP
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Data Ram Size
1 KB
On-chip Adc
10 bit, 16 channel
Number Of Programmable I/os
59
Number Of Timers
3
Height
0.9 mm
Interface Type
SPI, USART
Length
12.5 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
6.1 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
*COP8CCR9IMT7
*COP8CCR9IMT7/NOPB
COP8CCR9IMT7

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
COP8CCR9IMT7/NOPB
Manufacturer:
NS/TI
Quantity:
8
www.national.com
12.0 Timers
12.3 TIMER CONTROL FLAGS
The control bits and their functions are summarized below.
13.0 Power Saving Features
Today, the proliferation of battery-operated applications has
placed new demands on designers to drive power consump-
tion down. Battery operated systems are not the only type of
Mode
TxC3
TxC2
TxC1
TxC0
1
2
3
FIGURE 18. Timer in Input Capture Mode
Timer mode control
Timer mode control
Timer mode control
Timer Start/Stop control in Modes 1 and 2 (Pro-
TxC3
1
1
0
0
0
1
0
1
(Continued)
TxC2
0
0
0
0
1
1
1
1
TxC1
1
0
0
1
0
0
1
1
TABLE 15. Timer Operating Modes
10137421
PWM: TxA Toggle
PWM: No TxA
Toggle
External Event
Counter
External Event
Counter
Captures:
TxA Pos. Edge
TxB Pos. Edge
Captures:
TxA Pos. Edge
TxB Neg. Edge
Captures:
TxA Neg. Edge
TxB Pos. Edge
Captures:
TxA Neg. Edge
TxB Neg. Edge
Description
38
The timer mode control bits (TxC3, TxC2 and TxC1) are
detailed in Table 15, Timer Operating Modes.
When the high speed timers are counting in high speed
mode, directly altering the contents of the timer upper or
lower registers, the PWM outputs or the reload registers is
not recommended. Bit operations can be particularly prob-
lematic. Since any of these six registers or the PWM outputs
can change as many as ten times in a single instruction
cycle, performing an SBIT or RBIT operation with the timer
running can produce unpredictable results. The recom-
mended procedure is to stop the timer, perform any changes
to the timer, the PWM outputs or reload register values, and
then re-start the timer. This warning does not apply to the
timer control register. Any type of read/write operation, in-
cluding SBIT and RBIT may be performed on this register in
any operating mode.
applications demanding low power. The power budget con-
straints are also imposed on those consumer/industrial ap-
plications where well regulated and expensive power supply
costs cannot be tolerated. Such applications rely on low cost
and low power supply voltage derived directly from the
TxPNDA Timer Interrupt Pending Flag
TxENA
TxPNDB Timer Interrupt Pending Flag
TxENB
Autoreload RA
Autoreload RA
Timer Underflow
Timer Underflow
Pos. TxA Edge
or Timer
Underflow
Pos. TxA
Edge or Timer
Underflow
Neg. TxA
Edge or Timer
Underflow
Neg. TxA
Edge or Timer
Underflow
Interrupt A
Source
cessor Independent PWM and External Event
Counter), where 1 = Start, 0 = Stop
Timer Underflow Interrupt Pending Flag in Mode
3 (Input Capture)
Timer Interrupt Enable Flag
1 = Timer Interrupt Enabled
0 = Timer Interrupt Disabled
Timer Interrupt Enable Flag
1 = Timer Interrupt Enabled
0 = Timer Interrupt Disabled
Autoreload RB
Autoreload RB
Pos. TxB Edge
Pos. TxB Edge
Pos. TxB Edge
Neg. TxB
Edge
Pos. TxB
Edge
Neg. TxB
Edge
Interrupt B
Source
t
t
TxA Pos.
Edge
TxA Neg.
Edge
t
t
t
t
C
C
C
C
C
C
Counts On
or MCLK
or MCLK
or MCLK
or MCLK
or MCLK
or MCLK
Timer

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