DF3048BVX25WV Renesas Electronics America, DF3048BVX25WV Datasheet - Page 671

• Manufacturer Part Number: DF3048BVX25WV
• Description: MCU 3/5V 128K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3048BVX25WV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.2.2
MSTCR is an 8-bit readable/writable register that controls output of the system clock ( ). It also
controls the module standby function, which places individual on-chip supporting modules in the
standby state. Module standby can be designated for the ITU, SCI0, SCI1, DMAC, refresh
controller, and A/D converter modules.
MSTCR is initialized to H'40 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7— Clock Stop (PSTOP): Enables or disables output of the system clock ( ).
Bit 6—Reserved: Read-only bit, always read as 1.
Bit 5—Module Standby 5 (MSTOP5): Selects whether to place the ITU in standby.
Bit 1: PSTOP
0
1
Bit 5: MSTOP5
0
1
Bit
Initial value
Read/Write
Module Standby Control Register (MSTCR)
PSTOP
Enables or disables
output of the system clock
R/W
Description
System clock output is enabled
System clock output is disabled
Description
ITU operates normally
ITU is in standby state
7
0
clock stop
Reserved bit
6
1
MSTOP5
R/W
5
0
MSTOP4
R/W
4
0
Module standby 5 to 0
These bits select modules
to be placed in standby
Rev. 3.00 Sep 27, 2006 page 643 of 872
MSTOP3
R/W
3
0
MSTOP2
Section 20 Power-Down State
R/W
2
0
MSTOP1
R/W
REJ09B0325-0300
1
0
(Initial value)
(Initial value)
MSTOP0
R/W
0
0