HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 21

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Table 1-4. Arithmetic Instructions
Instruction Size*
ADD
SUB
ADDX
SUBX
INC
DEC
ADDS
SUBS
DAA
DAS
MULXU
DIVXU
CMP
NEG
* Size: Operand size
B: Byte
W: Word
B/W
B
B
W
B
B
B
B/W
B
Function
Rd ± Rs
or addition on immediate data and data in a general register.
Immediate data cannot be subtracted from data in a general register.
Word data can be added or subtracted only when both words are in
general registers.
Rd ± Rs ± C
in two general registers, or addition or subtraction on immediate data
and data in a general register.
Rd ± 1
Rd ± 1
register. The immediate data must be 1 or 2.
Rd decimal adjust
subtraction result in a general register by referring to the CCR.
Rd
general registers, providing a 16-bit result.
Rd ÷ Rs
registers, providing an 8-bit quotient and 8-bit remainder.
Rd – Rs,
register or with immediate data. Word data can be compared only
between two general registers.
0 – Rd
a general register.
Performs addition or subtraction on data in two general registers,
Performs addition or subtraction with carry or borrow on byte data
Increments or decrements a general register.
Adds or subtracts immediate data to or from data in a general
Decimal-adjusts (adjusts to packed BCD) an addition or
Performs 8-bit 8-bit unsigned multiplication on data in two
Performs 16-bit ÷ 8-bit unsigned division on data in two general
Compares data in a general register with data in another general
Obtains the two’s complement (arithmetic complement) of data in
Rs
Rd, Rd ± 2
Rd
Rd
Rd – #Imm
Rd
Rd, Rd + #Imm
Rd
Rd, Rd ± #Imm ± C
11
Rd
Rd
Rd
Rd