DF2339VFC25 Renesas Electronics America, DF2339VFC25 Datasheet - Page 247
![IC H8S MCU FLASH 384K 144QFP](/photos/28/61/286127/144-bfqfp_sml.jpg)
DF2339VFC25
Manufacturer Part Number
DF2339VFC25
Description
IC H8S MCU FLASH 384K 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2339VFC25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2339VFC25
HD64F2339VFC25
HD64F2339VFC25
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2339VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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2.2.64
STMAC (STore from MAC register)
Operation
MACH
or
MACL
Assembly-Language Format
STMAC MAC register, ERd
Operand Size
Longword
Description
This instruction moves the contents of a multiply-accumulate register (MACH or MACL) to a
general register. If the transfer is from MACH, the upper 22 bits transferred to the general register
are a sign extension.
This instruction is supported by the H8S/2600 CPU only.
Available Registers
ERd: ER0 to ER7
STMAC
ERd
ERd
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if a MAC instruction resulted in a
Z: Set to 1 if a MAC instruction resulted in a
V: Set to 1 if a MAC instruction resulted in
C: Previous value remains unchanged.
Note: * Execution of this instruction copies the N, Z,
negative MAC register value; otherwise
cleared to 0.
zero MAC register value; otherwise
cleared to 0.
an overflow; otherwise cleared to 0.
Rev. 4.00 Feb 24, 2006 page 231 of 322
—
I
and V flag values from the multiplier to the
condition-code register (CCR). If the STMAC
instruction is executed after a CLRMAC or
LDMAC instruction with no intervening MAC
instruction, the V flag will be 0 and the N and Z
flags will have undetermined values.
UI H
—
Section 2 Instruction Descriptions
Store Data from MAC Register
—
—
U
N
*
REJ09B0139-0400
Z
*
V
*
—
C
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