PCIMX515DJM8C Freescale Semiconductor, PCIMX515DJM8C Datasheet - Page 186

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PCIMX515DJM8C

Manufacturer Part Number
PCIMX515DJM8C
Description
MPU I.MX515 529-MABGAPGE
Manufacturer
Freescale Semiconductor
Series
i.MX51r
Datasheet

Specifications of PCIMX515DJM8C

Core Processor
ARM Cortex-A8
Core Size
32-Bit
Speed
800MHz
Connectivity
1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
128
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.8 V ~ 1.15 V
Oscillator Type
External
Operating Temperature
-20°C ~ 85°C
Package / Case
529-MABGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Package Information and Contact Assignments
5.2.3
See
186
1
2
Contact name
Signal Configuration as Fuse Override Input at Power Up. These are special I/O lines that control the boot up configuration
during product development. In production, the boot configuration is controlled by fuses.
Consider using an external 68 kΩ pull-up if system constraints indicate that the on-chip 100 kΩ pull-up is too weak.
KEY_COL4
KEY_COL5
Section 5.4, “19 x 19 mm, 0.8 Pitch Ball Map.”
19 x 19 Ball Map
After Reset
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
Direction
Output
Output
Table 132. Fuse Override Contacts (continued)
Configuration
After Reset
Low
Low
Output for diagnostic signal
ANY_PU_RST during
power-on reset
Output for diagnostic signal
JTAG_ACT during
power-on reset
Signal Configuration
1
External Termination for Fuse Override
Freescale Semiconductor

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