M30803FGFP#U5 Renesas Electronics America, M30803FGFP#U5 Datasheet - Page 86
M30803FGFP#U5
Manufacturer Part Number
M30803FGFP#U5
Description
MCU 3/5V 256K PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet
1.M30803FGGPU3.pdf
(360 pages)
Specifications of M30803FGFP#U5
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M
R
R
9.21 Address Match Interrupt
e
E
1
v
J
Figure 9.11 Address match interrupt-related registers
6
1 .
0
C
An address match interrupt is generated when the address match interrupt address register contents match
the program counter value. Four address match interrupts can be set, each of which can be enabled and
disabled by an address match interrupt enable bit. Address match interrupts are not affected by the inter-
rupt enable flag (I flag) and processor interrupt priority level (IPL).
Figure 9.11 shows the address match interrupt-related registers.
Set the start address of an instruction to the address match interrupt register.
Address match interrupt is not generated when address such as the middle of instruction or table data is
set.
9
0 .
8 /
B
Address match interrupt register i (i = 0 ot 3)
Address match interrupt enable register
(b23)
0
b7
0
b7
0
1
A
G
8
b6
u
7
o r
. g
0 -
u
b5
1
0
p
0
, 2
0
b4
2
0
b3
0
5
b2
(b16)
Page 73
b0 b7
b1
(b15)
b0
f o
Address setting register for address match
interrupt
3
Nothing is assigned.
When write, set "0". When read, their contents are indeterminate.
Bit symbol
2
AIER2
AIER3
9
AIER0
AIER1
Symbol
AIER
(b8)
b0
b7
Address match interrupt 2
Address match interrupt 3
Address match interrupt 0
Address match interrupt 1
Address
0009
Function
Bit name
16
enable bit
enable bit
enable bit
enable bit
b0
Symbol
RMAD0
RMAD1
RMAD2
RMAD3
XXXX0000
When reset
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
001E
0012
001A
0016
2
Address
16
16
16
16
000000
Values that can be set
to 001C
to 0010
to 0014
to 0018
Function
16
16
16
16
16
to FFFFFF
9. Interrupt Outline
When reset
000000
000000
000000
000000
16
R
R
16
16
16
16
W
W
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