PIC16C84-10/P Microchip Technology, PIC16C84-10/P Datasheet - Page 38
![MICRO CTRL 1KX14 EPR EEPR 18 DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16C84-10/P
Manufacturer Part Number
PIC16C84-10/P
Description
MICRO CTRL 1KX14 EPR EEPR 18 DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C84-04P.pdf
(108 pages)
Specifications of PIC16C84-10/P
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
EEPROM
Eeprom Size
64 x 8
Ram Size
36 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Data Converters
-
Connectivity
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PIC16C84
8.3
The PIC16C84 differentiates between various kinds
of reset:
• Power-on Reset (POR)
• MCLR reset during normal operation
• MCLR reset during SLEEP
• WDT Reset (during normal operation)
• WDT Wake-up (during SLEEP)
Figure 8-7 shows a simplified block diagram of the on-
chip reset circuit. The electrical specifications state the
pulse width requirements for the MCLR pin.
FIGURE 8-7:
DS30445C-page 38
Note 1: This is a separate oscillator from the
OSC1/
CLKIN
MCLR
V
DD
Reset
RC oscillator of the CLKIN pin.
RC OSC
On-chip
OST/PWRT
V
Module
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
detect
WDT
DD
(1)
rise
OST
PWRT
Time_Out
Reset
10-bit Ripple counter
WDT
10-bit Ripple counter
Power_on_Reset
External
Reset
SLEEP
Some registers are not affected in any reset condition;
their status is unknown on a POR reset and unchanged
in any other reset. Most other registers are reset to a
“reset state” on POR, MCLR or WDT reset during
normal operation and on MCLR reset during SLEEP.
They are not affected by a WDT reset during SLEEP,
since this reset is viewed as the resumption of normal
operation.
Table 8-3 gives a description of reset conditions for the
program counter (PC) and the STATUS register.
Table 8-4 gives a full description of reset states for all
registers.
The TO and PD bits are set or cleared differently in dif-
ferent reset situations (Section 8.7). These bits are
used in software to determine the nature of the reset.
Enable PWRT
Enable OST
See Table 8-5
1997 Microchip Technology Inc.
S
R
Q
Chip_Reset
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