PIC16C61/JW Microchip Technology, PIC16C61/JW Datasheet - Page 43

MICRO CTRL 1K 20MHZ EPROM 18CDIP

PIC16C61/JW

Manufacturer Part Number
PIC16C61/JW
Description
MICRO CTRL 1K 20MHZ EPROM 18CDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet

Specifications of PIC16C61/JW

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
EPROM, UV
Ram Size
36 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-CDIP (0.300", 7.62mm) Window
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C61/JW
Manufacturer:
MOT
Quantity:
161
FIGURE 4-18: PIR1 REGISTER FOR PIC16C64/64A/R64 (ADDRESS 0Ch)
1997 Microchip Technology Inc.
bit7
bit 7:
bit 6:
bit 5-4:
bit 3:
bit 2:
bit 1:
bit 0:
R/W-0
PSPIF
Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the
global enable bit, GIE (INTCON<7>). User software should ensure the appropriate interrupt flag bits are clear prior to
enabling an interrupt.
PSPIF: Parallel Slave Port Interrupt Flag bit
1 = A read or a write operation has taken place (must be cleared in software)
0 = No read or write operation has taken place
Reserved: Always maintain this bit clear.
Unimplemented: Read as '0'
SSPIF: Synchronous Serial Port Interrupt Flag bit
1 = The transmission/reception is complete (must be cleared in software)
0 = Waiting to transmit/receive
CCP1IF: CCP1 Interrupt Flag bit
Capture Mode
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM Mode
Unused in this mode
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = TMR1 register overflow occurred (must be cleared in software)
0 = No TMR1 register occurred
R/W-0
U-0
U-0
SSPIF
R/W-0
CCP1IF
R/W-0
TMR2IF
R/W-0
TMR1IF
R/W-0
bit0
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
R = Readable bit
read as ‘0’
PIC16C6X
DS30234D-page 43

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