PIC17C756-33I/SP Microchip Technology, PIC17C756-33I/SP Datasheet - Page 141
PIC17C756-33I/SP
Manufacturer Part Number
PIC17C756-33I/SP
Description
MICRO CTRL 16K MEMORY OTP 64SDIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-33I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
PIC17C756-33I/P
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C756-33I/SP
Manufacturer:
OKI
Quantity:
6 270
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 141 of 321
- Download datasheet (3Mb)
15.2.3
Master mode of operation is supported by interrupt
generation on the detection of the START and STOP
conditions. The STOP (P) and START (S) bits are
cleared from a reset or when the SSP module is dis-
abled. Control of the I
bit is set, or the bus is idle with both the S and P bits
clear.
In master mode, the SCL and SDA lines are manipu-
lated by the SSP hardware.
FIGURE 15-20: SSP BLOCK DIAGRAM (I
1997 Microchip Technology Inc.
SDA
SCL
MASTER MODE
2
C bus may be taken when the P
SDA in
Bus Collision
SCL in
Read
MSb
Write collision detect
end of XMIT/RCV
Start bit, Stop bit,
Clock Arbitration
State counter for
Start bit detect,
2
Stop bit detect
Acknowledge
C MASTER MODE)
Generate
SSPBUF
Preliminary
SSPSR
LSb
Write
The following events will cause SSP Interrupt Flag bit,
SSPIF, to be set (SSP Interrupt if enabled):
• START condition
• STOP condition
• Data transfer byte transmitted/received
clock
data bus
shift
Internal
Set/Reset, S, P, WCOL (SSPSTAT)
Set SSPIF, BCLIF
Reset ACKSTAT, PEN (SSPCON2)
SSPADD<6:0>
SSPM3:SSPM0
Baud
rate
generator
DS30264A-page 141
Related parts for PIC17C756-33I/SP
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
MICRO CTRL 16K MEMORY OTP 64SDIP
Manufacturer:
Microchip Technology
Datasheet:
Part Number:
Description:
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer:
Microchip Technology
Datasheet:
Part Number:
Description:
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer:
Microchip Technology
Datasheet:
Part Number:
Description:
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer:
Microchip Technology
Datasheet:
Part Number:
Description:
MICRO CTRL 16K MEMORY OTP 64SDIP
Manufacturer:
Microchip Technology
Datasheet:
Part Number:
Description:
MICRO CTRL 16K MEMORY OTP 64SDIP
Manufacturer:
Microchip Technology
Datasheet:
Part Number:
Description:
MICRO CTRL 16K MEMORY EPROM 68CL
Manufacturer:
Microchip Technology
Datasheet:
Part Number:
Description:
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer:
Microchip Technology
Datasheet:
Part Number:
Description:
High-Performance 8-Bit CMOS EPROM Microcontrollers
Manufacturer:
Microchip Technology
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet: