PIC17C756-33I/L Microchip Technology, PIC17C756-33I/L Datasheet - Page 49
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC17C756-33I/L
Manufacturer Part Number
PIC17C756-33I/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-33I/L
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756-33I/L
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 49 of 321
- Download datasheet (3Mb)
7.2.2.3
This register contains various control bits. Bit7
(INTEDG) is used to control the edge upon which a sig-
nal on the RA0/INT pin will set the RA0/INT interrupt
flag. The other bits configure the Timer0 prescaler and
clock source.
FIGURE 7-8:
1997 Microchip Technology Inc.
bit7
bit 7:
bit 6:
bit 5:
bit 4-1: T0PS3:T0PS0: Timer0 Prescale Selection bits
bit 0:
INTEDG
R/W - 0
TMR0 STATUS/CONTROL REGISTER
(T0STA)
INTEDG: RA0/INT Pin Interrupt Edge Select bit
This bit selects the edge upon which the interrupt is detected.
1 = Rising edge of RA0/INT pin generates interrupt
0 = Falling edge of RA0/INT pin generates interrupt
T0SE: Timer0 Clock Input Edge Select bit
This bit selects the edge upon which TMR0 will increment.
When T0CS = 0 (External Clock)
1 = Rising edge of RA1/T0CKI pin increments TMR0 and/or generates a T0CKIF interrupt
0 = Falling edge of RA1/T0CKI pin increments TMR0 and/or generates a T0CKIF interrupt
When T0CS = 1 (Internal Clock)
Don’t care
T0CS: Timer0 Clock Source Select bit
This bit selects the clock source for Timer0.
1 = Internal instruction clock cycle (T
0 = External clock input on the T0CKI pin
These bits select the prescale value for Timer0.
Unimplemented: Read as '0'
T0PS3:T0PS0
R/W - 0
T0SE
0000
0001
0010
0011
0100
0101
0110
0111
1xxx
T0STA REGISTER (ADDRESS: 05h, UNBANKED)
R/W - 0
T0CS
Prescale Value
R/W - 0
T0PS3
1:1
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
R/W - 0
T0PS2
CY
Preliminary
)
R/W - 0
T0PS1
R/W - 0
T0PS0
U - 0
—
bit0
R = Readable bit
W = Writable bit
U = Unimplemented,
-n = Value at POR reset
reads as ‘0’
DS30264A-page 49
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