PIC16C54B-04I/P Microchip Technology, PIC16C54B-04I/P Datasheet - Page 42
![MICRO CTRL 512 4MHZ OTP 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16C54B-04I/P
Manufacturer Part Number
PIC16C54B-04I/P
Description
MICRO CTRL 512 4MHZ OTP 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C54B-04I/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
12
Program Memory Size
768B (512 x 12)
Program Memory Type
OTP
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Data Converters
-
Connectivity
-
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PIC16C5X
7.9
A device may be powered down (SLEEP) and later
powered up (Wake-up from SLEEP).
7.9.1
The Power-Down mode is entered by executing a
SLEEP instruction.
If enabled, the Watchdog Timer will be cleared but
keeps running, the TO bit (STATUS<4>) is set, the PD
bit (STATUS<3>) is cleared and the oscillator driver is
turned off. The I/O ports maintain the status they had
before the SLEEP instruction was executed (driving
high, driving low, or hi-impedance).
It should be noted that a RESET generated by a WDT
time-out does not drive the MCLR/V
For lowest current consumption while powered down,
the T0CKI input should be at V
MCLR/V
7.9.2
The device can wake up from SLEEP through one of
the following events:
1.
2.
Both of these events cause a device reset. The TO and
PD bits can be used to determine the cause of device
reset.
occurred (and caused wake-up). The PD bit, which is
set on power-up, is cleared when SLEEP is invoked.
The WDT is cleared when the device wakes from
sleep, regardless of the wake-up source.
DS30453B-page 42
An external reset input on MCLR/V
A Watchdog Timer time-out reset (if WDT was
enabled).
PP
Power-Down Mode (SLEEP)
SLEEP
WAKE-UP FROM SLEEP
The TO bit is cleared if a WDT time-out
pin must be at a logic high level.
DD
PP
or V
pin low.
PP
SS
pin.
and the
Preliminary
7.10
If
programmed, the on-chip program memory can be
read out for verification purposes.
7.11
Four memory locations are designated as ID locations
where the user can store checksum or other
code-identification numbers. These locations are not
accessible during normal execution but are readable
and writable during program/verify.
Use only the lower 4 bits of the ID locations and
always program the upper 8 bits as '1's.
Note:
Note:
the
Program Verification/Code Protection
ID Locations (not implemented on
PIC16C52)
code
Microchip does not recommend code pro-
tecting windowed devices.
Microchip will assign a unique pattern
number for QTP and SQTP requests and
for ROM devices. This pattern number will
be unique and traceable to the submitted
code.
protection
1998 Microchip Technology Inc.
bit(s)
have
not
been
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