PIC16C773/JW Microchip Technology, PIC16C773/JW Datasheet - Page 35

• Manufacturer Part Number: PIC16C773/JW
• Description: IC MCU EPROM4KX14 A/D PWM 28CDIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C773/JW

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: EPROM, UV
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-CDIP (0.300", 7.62mm) Window
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

3.5
This section is applicable to the 40/44-pin devices only.
PORTE has three pins RE0/RD/AN5, RE1/WR/AN6
and RE2/CS/AN7, which are individually configurable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
I/O PORTE becomes control inputs for the micropro-
cessor port when bit PSPMODE (TRISE<4>) is set. In
this mode, the user must make sure that the
TRISE<2:0> bits are set (pins are configured as digital
inputs). Ensure ADCON1 is configured for digital I/O. In
this mode the input buffers are TTL.
Figure 3-12
trols the parallel slave port operation.
PORTE pins are multiplexed with analog inputs. When
selected as an analog input, these pins will read as ’0’s.
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
FIGURE 3-12: TRISE REGISTER (ADDRESS 89h)
Note:
bit7
1999 Microchip Technology Inc.
bit 7 :
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R-0
IBF
PORTE and TRISE Register
On a Power-on Reset these pins are con-
figured as analog inputs.
IBF: Input Buffer Full Status bit
1 = A word has been received and is waiting to be read by the CPU
0 = No word has been received
OBF: Output Buffer Full Status bit
1 = The output buffer still holds a previously written word
0 = The output buffer has been read
IBOV: Input Buffer Overflow Detect bit (in microprocessor mode)
1 = A write occurred when a previously input word has not been read (must be cleared in software)
0 = No overflow occurred
PSPMODE: Parallel Slave Port Mode Select bit
1 = Parallel slave port mode
0 = General purpose I/O mode
Unimplemented: Read as '0'
PORTE Data Direction Bits
Bit2: Direction Control bit for pin RE2/CS/AN7
1 = Input
0 = Output
Bit1: Direction Control bit for pin RE1/WR/AN6
1 = Input
0 = Output
Bit0: Direction Control bit for pin RE0/RD/AN5
1 = Input
0 = Output
shows the TRISE register, which also con-
OBF
R-0
R/W-0
IBOV
PSPMODE
R/W-0
Advance Information
U-0
—
R/W-1
bit2
FIGURE 3-11: PORTE BLOCK DIAGRAM (IN
Note 1: I/O pins have protection diodes to V
R/W-1
bit1
Data
bus
WR
TRIS
WR
PORT
RD PORT
R/W-1
TRIS Latch
Data Latch
bit0
D
D
CK
CK
bit0
RD TRIS
I/O PORT MODE)
Q
Q
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
PIC16C77X
Q
read as ‘0’
EN
Schmitt
Trigger
input
buffer
EN
D
DS30275A-page 35
DD
I/O pin
and V
SS
(1)
.