AT91R40807-33AI Atmel, AT91R40807-33AI Datasheet

IC ARM7 MCU 176 TQFP

AT91R40807-33AI

Manufacturer Part Number
AT91R40807-33AI
Description
IC ARM7 MCU 176 TQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91R40807-33AI

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Price
Part Number:
AT91R40807-33AI
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Part Number:
AT91R40807-33AI
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Quantity:
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Features
Description
The AT91R40807 microcontroller is a member of the Atmel AT91 16-/32-bit microcon-
troller family, which is based on the ARM7TDMI processor core. This processor has a
high-performance 32-bit RISC architecture with a high-density 16-bit instruction set
and very low power consumption. In addition, a large number of internally banked reg-
isters result in very fast exception handling, making the device ideal for real-time
control applications.
The AT91R40807 microcontroller features a direct connection to off-chip memory,
including Flash, through the fully-programmable External Bus Interface (EBI). An
eight-level priority vectored interrupt controller, in conjunction with the Peripheral Data
Controller, significantly improves the real-time performance of the device.
The device is manufactured using Atmel’s high-density CMOS technology. By combin-
ing the ARM7TDMI processor core with a large on-chip high-speed SRAM and a wide
range of peripheral functions on a monolithic chip, the AT91R40807 is a powerful
microcontroller that offers a flexible and high-performance solution to many compute-
intensive embedded control applications.
Incorporates the ARM7TDMI
136K Bytes of On-chip SRAM
Fully-programmable External Bus Interface (EBI)
8-level Priority, Individually Maskable, Vectored Interrupt Controller
32 Programmable I/O Lines
Three-channel 16-bit Timer/Counter
Two USARTs
Programmable Watchdog Timer
Advanced Power-saving Features
Fully Static Operation: 0 Hz to 33 MHz Internal Frequency Range at 3.0 V, 85°C
1.8V to 3.6V Operating Range
Available in a 100-lead TQFP Package
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Embedded ICE (In-Circuit Emulation)
– 32-bit Data Bus
– Single-clock Cycle Access
– Maximum External Address Space of 64M Bytes
– Up to Eight Chip Selects
– Software Programmable 8-/16-bit External Data Bus
– Four External Interrupts, Including a High-priority Low-latency Interrupt Request
– Three External Clock Inputs
– Two Multi-purpose I/O Pins per Channel
– Two Dedicated Peripheral Data Controller (PDC) Channels per USART
– CPU and Peripherals Can be Deactivated Individually
ARM
®
Thumb
®
Processor Core
AT91
ARM
Microcontroller
s
AT91R40807
Electrical
Characteristics
®
Thumb
Rev. 1367C–01/02
®
1

Related parts for AT91R40807-33AI

AT91R40807-33AI Summary of contents

Page 1

... The device is manufactured using Atmel’s high-density CMOS technology. By combin- ing the ARM7TDMI processor core with a large on-chip high-speed SRAM and a wide range of peripheral functions on a monolithic chip, the AT91R40807 is a powerful microcontroller that offers a flexible and high-performance solution to many compute- intensive embedded control applications. ® ...

Page 2

... PULL C Input Capacitance IN I Static Current SC AT91R40807 2 *NOTICE: Stresses beyond those listed under “Absolute Maxi- mum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied ...

Page 3

... Conditions Fetch in ARM mode out of internal SRAM All peripheral clocks activated Fetch in ARM mode out of internal SRAM All peripheral clocks deactivated All peripheral clocks activated All peripheral clocks deactivated AT91R40807 V DD 2.0V 3.3V Units 0.08 0.20 1.56 5.34 1.39 4 ...

Page 4

... The number of gates and the device die size are provided for the user to calculate reliability data with another standard and/or in another environmental model. Table 6. Reliability Data Parameter Number of Logic Gates Number of Memory Gates Device Die Size AT91R40807 4 Junction Temperature (T ) (°C) J 100 125 ...

Page 5

... Junction-to-ambient (°C/W), provided in Table package thermal resistance, Junction-to-case thermal resistance (°C/W), provided cooling device thermal resistance (°C/W), provided in the device datasheet. HEAT SINK = device power consumption (W) estimated from data provided in the section “Power D = ambient temperature (°C). A AT91R40807 in °C can be obtained from the following ...

Page 6

... VDD • t datasheet capacitance of 0 pF. • C δ • CSignal pins given in Min and Max in this datasheet. The input delays are given as typical value. Note: AT91R40807 6 = 3.3V ) for a low-level detection and is (0 δ × δ × ° VDD DATASHEET is the derating factor in temperature given in the Figure 1 on page 7. ...

Page 7

... Supply Voltage (V) This derating factor is applicable only to timings related to output pins. AT91R40807 Derating Factor for Typ Case 100 120 140 160 Derating Factor for Typ Case is 1 2.8 3.0 3.2 3 ...

Page 8

... Low Half-period CL t Rising Edge r t Falling Edge f Table 8. Clock Propagation Times Symbol Parameter t Rising Edge Propagation Time CDLH t Falling Edge Propagation Time CDHL Figure 3. Clock Waveform 0 MCKI 0.5 V MCKO t CDLH AT91R40807 8 Conditions Conditions MCKO C derating MCKO MCKO C derating MCKO 0 0.5 V ...

Page 9

... Table 9. NRST to MCKO Symbol t D Figure 4. MCKO Relative to NRST 1367C–01/02 Parameter NRST Rising Edge to MCKO Valid Time NRST t D MCKO AT91R40807 Min Max Units 3(t /2) 7(t / ...

Page 10

... MCKI Falling to NUB Valid 1 EBI MCKI Falling to NLB/A0 Valid 2 EBI MCKI Falling A23 Valid 3 EBI MCKI Falling to Chip Select Change 4 EBI NWAIT Setup before MCKI Rising 5 EBI NWAIT Hold after MCKI Rising 6 AT91R40807 10 Conditions Min 5.9 NUB C derating 0.032 NUB 5.2 NLB C derating 0 ...

Page 11

... ADD C derating ADD NCS C derating NCS derating DATA C derating NWR derating DATA C derating NWR ( AT91R40807 Min Max Units 4.3 7.5 ns 0.032 0.05 ns/pF 4.9 8.5 ns 0.032 0.05 ns/pF 5.1 8.8 ns 0.032 0.049 ns/pF 4.6 8.0 ns 0.032 0.049 ns/pF 4.0 9 0.051 ns/pF 3 ...

Page 12

... EBI NRD Minimum Pulse Width 33 EBI NRD Minimum Pulse Width 34 Notes: 1. Early Read Protocol. 2. Standard Read Protocol. 3. The derating factor is not to be applied number of standard wait states. 5. Only one of these two timings needs to be met. AT91R40807 12 Conditions NRD (1) C derating NRD ...

Page 13

... Applicable only for chip select programmed with 0 wait state. If this condition is not met, at least one wait state must be programmed. 1367C–01/02 Conditions Min 9.2 NRD C derating 0.048 NRD 9.6 NWR C derating 0.049 NWR (Data Float Output Time) cycle. DF Cycle and an additional wait state. DF AT91R40807 Max Units ns ns/pF ns ns/pF 13 ...

Page 14

... Figure 5. EBI Signals Relative to MCKI MCKI NCS A23 NWAIT NUB/NLB/A0 (1) NRD (2) NRD D0 - D15 Read NWR (No Wait States) NWR (Wait States D15 to Write Notes: 1. Early Read Protocol. 2. Standard Read Protocol. AT91R40807 14 EBI 4 EBI 3 EBI EBI 5 6 EBI /EBI 1 2 EBI 21 EBI 23 EBI ...

Page 15

... Table 14. USART Asynchronous Mode Input Minimum Pulse Width Symbol US 1 Table 15. USART Minimum Input Period Symbol US 2 Figure 6. USART Signals 1367C–01/02 Parameter SCK/RXD Minimum Pulse Width Parameter SCK Minimum Input Period US 1 RXD SCK AT91R40807 Min Pulse Width 5(t /2) CP Min Input Period 9(t / Units ns Units ns 15 ...

Page 16

... A minimum pulse width is necessary as shown in Table 18 and as represented in Figure 8. Table 18. Reset Minimum Pulse Width Symbol RST 1 Figure 8. Reset Signal Only the NRST rising edge is synchronized with MCKI. The falling edge is asynchronous. AT91R40807 Waveform Event Detection mode and 4(t CP Parameter TCLK/TIOA/TIOB Minimum Pulse Width Parameter ...

Page 17

... Figure 10. PIO Signal 1367C–01/02 Parameter FIQ/IRQ0/IRQ1/IRQ2/IRQ3 Minimum Pulse Width Parameter AIC Minimum Input Period MCKI Input Parameter PIO Input Minimum Pulse Width PIO Inputs AT91R40807 Min Pulse Width 3(t /2) CP Min Input Period 5(t /2) CP AIC 2 AIC 1 Min Pulse Width ...

Page 18

... ICE 8 ICE 9 Figure 11. ICE Interface Signals NTRST TCK TMS/TDI TDO AT91R40807 18 Parameter NTRST Minimum Pulse width NTRST High Recovery to TCK High NTRST High Removal from TCK High TCK Low Half-period TCK High Half-period TCK Period TDI, TMS Setup Before TCK High ...

Page 19

... Document Details Title AT91R40807 Electrical Characteristics Literature Number Lit# 1367C Revision History Version A Publication Date: Apr, 2000 Version B Publication Date: Nov, 2000 Version C Publication Date: 10, Dec, 2001 Revisions Since Previous Version published on Intranet Page: 1 “Features” “Fully Static Operation MHz Internal Frequency Range at 3.0 V, 85°C” ...

Page 20

... Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted ® ...

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