AT90LS8535-4AC Atmel, AT90LS8535-4AC Datasheet - Page 37
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AT90LS8535-4AC
Manufacturer Part Number
AT90LS8535-4AC
Description
IC MCU 8K 4MHZ A/D LV 44TQFP
Manufacturer
Atmel
Series
AVR® 90LSr
Specifications of AT90LS8535-4AC
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90LS8535-4AC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Timer/Counter1 Control
Register B – TCCR1B
1041H–11/01
Table 11. Compare 1 Mode Select
Note:
In PWM mode, these bits have a different function. Refer to Table 15 for a detailed
description. When changing the COM1X1/COM1X0 bits, Output Compare Interrupt 1
must be disabled by clearing their Interrupt Enable bits in the TIMSK Register. Other-
wise an interrupt can occur when the bits are changed.
• Bits 3..2 – Res: Reserved Bits
These bits are reserved bits in the AT90S8535 and always read zero.
• Bits 1..0 – PWM11, PWM10: Pulse Width Modulator Select Bits
These bits select PWM operation of Timer/Counter1 as specified in Table 12. This mode
is described on page 40.
Table 12. PWM Mode Select
• Bit 7 – ICNC1: Input Capture1 Noise Canceler (4 CKs)
When the ICNC1 bit is cleared (zero), the Input Capture Trigger Noise Canceler function
is disabled. The input capture is triggered at the first rising/falling edge sampled on the
ICP (input capture pin) as specified. When the ICNC1 bit is set (one), four successive
samples are measured on the ICP (input capture pin), and all samples must be high/low
according to the input capture trigger specification in the ICES1 bit. The actual sampling
frequency is XTAL clock frequency.
• Bit 6 – ICES1: Input Capture1 Edge Select
While the ICES1 bit is cleared (zero), the Timer/Counter1 contents are transferred to the
Input Capture Register (ICR1) on the falling edge of the input capture pin (ICP). While
the ICES1 bit is set (one), the Timer/Counter1 contents are transferred to the Input Cap-
ture Register (ICR1) on the rising edge of the input capture pin (ICP).
• Bits 5, 4 – Res: Reserved Bits
These bits are reserved bits in the AT90S8535 and always read zero.
Bit
$2E ($4E)
Read/Write
Initial Value
COM1X1
PWM11
0
0
1
1
0
0
1
1
X = A or B.
ICNC1
R/W
7
0
COM1X0
PWM10
0
1
0
1
0
1
0
1
ICES1
R/W
6
0
Description
Timer/Counter1 disconnected from output pin OC1X
Toggle the OC1X output line.
Clear the OC1X output line (to zero).
Set the OC1X output line (to one).
Description
PWM operation of Timer/Counter1 is disabled
Timer/Counter1 is an 8-bit PWM
Timer/Counter1 is a 9-bit PWM
Timer/Counter1 is a 10-bit PWM
R
5
–
0
R
4
–
0
CTC1
R/W
3
0
CS12
R/W
2
0
AT90S/LS8535
CS11
R/W
1
0
CS10
R/W
0
0
TCCR1B
37