PIC12C672T-04E/SM Microchip Technology, PIC12C672T-04E/SM Datasheet - Page 19
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC12C672T-04E/SM
Manufacturer Part Number
PIC12C672T-04E/SM
Description
IC MCU OTP 2KX14 A/D 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C672T-04E/SM
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOIC309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
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4.2.2.5
This register contains the individual flag bits for the
Peripheral interrupts.
REGISTER 4-5:
bit7
1999 Microchip Technology Inc.
bit 7:
bit 6:
bit 5-0: Unimplemented: Read as ’0’
U-0
—
PIR1 REGISTER
Unimplemented: Read as ’0’
ADIF: A/D Converter Interrupt Flag bit
1 = An A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
R/W-0
ADIF
PIR1 REGISTER (ADDRESS 0Ch)
U-0
—
U-0
—
U-0
—
U-0
—
Note:
U-0
—
Interrupt flag bits get set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
U-0
—
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
PIC12C67X
read as ‘0’
DS30561B-page 19
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