PIC16C65A-10I/L Microchip Technology, PIC16C65A-10I/L Datasheet - Page 66
![IC MCU OTP 4KX14 PWM 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16C65A-10I/L
Manufacturer Part Number
PIC16C65A-10I/L
Description
IC MCU OTP 4KX14 PWM 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16LC62A-04SP.pdf
(337 pages)
4.PIC16C65A-20P.pdf
(8 pages)
5.PIC16C65A-20P.pdf
(4 pages)
Specifications of PIC16C65A-10I/L
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
DVA16XL441 - ADAPTER DEVICE ICE 44PLCC309-1040 - ADAPTER 44-PLCC ZIF TO 40-DIP309-1039 - ADAPTER 44-PLCC TO 40-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C65A-10I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16LC62A-04SP PDF datasheet #3
- PIC16C65A-20P PDF datasheet #4
- PIC16C65A-20P PDF datasheet #5
- Current page: 66 of 337
- Download datasheet (3Mb)
PIC16C6X
FIGURE 7-3:
FIGURE 7-4:
DS30234D-page 66
Instruction
PC
(Program
Counter)
Fetch
Instruction
Execute
TMR0
INSTRUCTION
FLOW
GIE bit
(INTCON<7>)
T0IF bit
(INTCON<2>)
Instruction
fetched
Instruction
executed
Timer0
CLKOUT(3)
OSC1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
PC
T0
Note 1: Interrupt flag bit T0IF is sampled here (every Q1).
PC-1
TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1:2
TMR0 INTERRUPT TIMING
Q1
2: Interrupt latency = 4Tcy where Tcy = instruction cycle time.
3: CLKOUT is available only in RC oscillator mode.
FEh
Inst (PC)
Inst (PC-1)
Q2
1
PC
MOVWF TMR0
Q3
PC
T0+1
Q4
MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W
Q1
Write TMR0
executed
FFh
PC+1
Inst (PC+1)
Inst (PC)
Q2
1
PC +1
Q3
Read TMR0
reads NT0
Q4
PC+2
Q1
00h
Dummy cycle
Q2
Read TMR0
reads NT0
PC +1
PC+3
Q3
NT0
Q4
MOVF TMR0,W
Read TMR0
reads NT0
Q1
PC+4
01h
Dummy cycle
Inst (0004h)
Q2
0004h
MOVF TMR0,W
Q3
Read TMR0
reads NT0
1997 Microchip Technology Inc.
PC+5
Q4
Q1
Read TMR0
reads NT0 + 1
02h
NT0+1
Inst (0004h)
Inst (0005h)
PC+6
Q2
0005h
Q3
Q4
T0
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