PIC16C662-04/PQ Microchip Technology, PIC16C662-04/PQ Datasheet - Page 36

• Manufacturer Part Number: PIC16C662-04/PQ
• Description: IC MCU OTP 4KX14 COMP 44-MQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C662-04/PQ

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-MQFP, 44-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

PIC16C64X & PIC16C66X
5.5
PORTE has three pins RE0/RD, RE1/WR, and RE2/
CS, which are individually configurable as inputs or
outputs. These pins have Schmitt Trigger input buffers.
I/O PORTE becomes control inputs for the micropro-
cessor port when bit PSPMODE (TRISE<4>) is set. In
this mode, the user must make sure that the
TRISE<2:0> bits are set (pins are configured as digital
inputs). In this mode the input buffers are TTL.
FIGURE 5-9:
DS30559A-page 36
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R-0
IBF
PORTE and TRISE Register
(PIC16C661 and PIC16C662 only)
IBF: Input Buffer Full Status bit
1 = A word has been received and waiting to be read by the CPU
0 = No word has been received
OBF: Output Buffer Full Status bit
1 = The output buffer still holds a previously written word
0 = The output buffer has been read
IBOV: Input Buffer Overflow Detect bit (in microprocessor mode)
1 = A write occurred when a previously input word has not been read (must be cleared in software)
0 = No overflow occurred
PSPMODE: Parallel Slave Port Mode Select bit
1 = Parallel slave port mode
0 = General purpose I/O mode
Unimplemented: Read as '0'
TRISE2: Direction control bit for pin RE2/CS
1 = Input
0 = Output
TRISE1: Direction control bit for pin RE1/WR
1 = Input
0 = Output
TRISE0: Direction control bit for pin RE0/RD
1 = Input
0 = Output
OBF
R-0
TRISE REGISTER (ADDRESS 89h)
R/W-0
IBOV
PSPMODE
R/W-0
U-0
—
Preliminary
TRISE2
R/W-1
Figure 5-9 shows the TRISE register, which also con-
trols the parallel slave port operation.
TRISE1
R/W-1
TRISE0
R/W-1
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
1996 Microchip Technology Inc.
read as ‘0’