PIC16C923-08/PT Microchip Technology, PIC16C923-08/PT Datasheet - Page 106
![IC MCU OTP 4KX14 LCD DVR 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC16C923-08/PT
Manufacturer Part Number
PIC16C923-08/PT
Description
IC MCU OTP 4KX14 LCD DVR 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F818-ISO.pdf
(6 pages)
2.PIC16C923-04L.pdf
(189 pages)
3.PIC16C923-04L.pdf
(10 pages)
Specifications of PIC16C923-08/PT
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-TFQFP
For Use With
DVA16PQ640 - ADAPTER DEVICE FOR MPLAB-ICEAC164023 - MODULE SKT PROMATEII 68TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
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PIC16C9XX
14.3
The PIC16CXX differentiates between various kinds of
reset:
• Power-on Reset (POR)
• MCLR Reset during normal operation
• MCLR Reset during SLEEP
• WDT Reset (normal operation)
Some registers are not affected in any reset condition;
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on Reset (POR), on the MCLR and
WDT Reset, and on MCLR Reset during SLEEP. They
are not affected by a WDT Wake-up, which is viewed as
FIGURE 14-7: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
DS30444E - page 106
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
MCLR
OSC1
V
DD
2: See Table 14-3 for time-out situations.
Reset
RC OSC
On-chip
OST/PWRT
V
Module
(1)
detect
WDT
DD
rise
OST
PWRT
10-bit Ripple counter
WDT
10-bit Ripple counter
Time-out
Power-on Reset
External
Reset
SLEEP
Enable PWRT
Enable OST
the resumption of normal operation. The TO and PD
bits are set or cleared differently in different reset situ-
ations as indicated in Table 14-4. These bits are used
in software to determine the nature of the reset. See
Table 14-6 for a full description of reset states of all reg-
isters.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 14-7.
The devices all have a MCLR noise filter in the MCLR
reset path. The filter will detect and ignore small pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
(2)
(2)
1997 Microchip Technology Inc.
S
R
Q
Chip_Reset
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