PIC16LC642-04I/SO Microchip Technology, PIC16LC642-04I/SO Datasheet - Page 56

• Manufacturer Part Number: PIC16LC642-04I/SO
• Description: IC MCU OTP 4KX14 COMP 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC642-04I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, WDT
• Number Of I /o: 22
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC16LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Interface Type: RS- 232
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16C64X & PIC16C66X
9.1
The configuration bits can be programmed (read as '0')
or left unprogrammed (read as '1') to select various
device configurations. These bits are mapped in
program memory location 2007h.
FIGURE 9-1:
DS30559A-page 56
CP1
bit13
bit 13-8
bit 7:
bit 6:
bit 3:
bit 2:
bit 1-0:
Note
5-4:
CP0
Configuration Bits
1: Enabling Brown-out Reset automatically enables the Power-up Timer (PWRT) regardless of the value of bit PWRTE. Ensure the
2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed.
CP1:CP0: Code protection bits
11 = Code protection off
10 = Upper half of program memory code protected
01 = Upper 3/4th of program memory code protected
00 = All memory is code protected
MPEEN : Memory Parity Error Enable
1 = Memory Parity Checking is enabled
0 = Memory Parity Checking is disabled
BODEN : Brown-out Reset Enable bit
1 = BOR enabled
0 = BOR disabled
PWRTE : Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE : Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC1:FOSC0 : Oscillator Selection bits
11 = RC oscillator
10 = HS oscillator
01 = XT oscillator
00 = LP oscillator
Power-up Timer is enabled anytime Brown-out Reset is enabled.
CP1
CONFIGURATION WORD
CP0
CP1
CP0
MPEEN
(2)
(1)
(1)
BODEN CP1
Preliminary
CP0
PWRTE
The user will note that address 2007h is beyond
the user program memory space. In fact, it belongs
to the special test/configuration
(2000h–3FFFh), which can be accessed only during
programming.
WDTE
FOSC1 FOSC0
bit0
1996 Microchip Technology Inc.
CONFIG
REGISTER:
memory
Address
2007h
space