PIC17C42A-25I/PT Microchip Technology, PIC17C42A-25I/PT Datasheet - Page 69
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PIC17C42A-25I/PT
Manufacturer Part Number
PIC17C42A-25I/PT
Description
IC MCU OTP 2KX16 PWM 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C42A-16P.pdf
(241 pages)
3.PIC17C42A-16P.pdf
(4 pages)
Specifications of PIC17C42A-25I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
4KB (2K x 16)
Program Memory Type
OTP
Ram Size
232 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
AC164315 - MODULE SKT MPLAB PM3 44TQFPAC174005 - MODULE SKT PROMATEII 44TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C42A-25I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 69 of 241
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11.3
Although TMR0 is a 16-bit timer/counter, only 8-bits at
a time can be read or written during a single instruction
cycle. Care must be taken during any read or write.
11.3.1
The problem in reading the entire 16-bit value is that
after reading the low (or high) byte, its value may
change from FFh to 00h.
Example 11-1 shows a 16-bit read. To ensure a proper
read, interrupts must be disabled during this routine.
EXAMPLE 11-1: 16-BIT READ
MOVPF
MOVPF
MOVFP
CPFSLT
RETURN
MOVPF
MOVPF
RETURN
FIGURE 11-4: TMR0 TIMING: WRITE HIGH OR LOW BYTE
1996 Microchip Technology Inc.
AD15:AD0
Instruction
executed
TMR0H
TMR0L
Fetch
Read/Write Consideration for TMR0
READING 16-BIT VALUE
TMR0L, TMPLO
TMR0H, TMPHI
TMPLO, WREG
TMR0L
TMR0L, TMPLO
TMR0H, TMPHI
ALE
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
T0
PC
;read low tmr0
;read high tmr0
;tmplo
;tmr0l < wreg?
;no then return
;read low tmr0
;read high tmr0
;return
MOVFP W,TMR0L
Write to TMR0L
T0+1
PC+1
wreg
MOVFP TMR0L,W
(Value = NT0)
Read TMR0L
New T0 (NT0)
PC+2
11.3.2
Since writing to either TMR0L or TMR0H will effectively
inhibit increment of that half of the TMR0 in the next
cycle (following write), but not inhibit increment of the
other half, the user must write to TMR0L first and
TMR0H next in two consecutive instructions, as shown
in Example 11-2. The interrupt must be disabled. Any
write to either TMR0L or TMR0H clears the prescaler.
EXAMPLE 11-2: 16-BIT WRITE
BSF
MOVFP RAM_L, TMR0L
MOVFP RAM_H, TMR0H
BCF
11.4
Timer0 has an 8-bit prescaler. The prescaler assign-
ment is fully under software control; i.e., it can be
changed “on the fly” during program execution. When
changing the prescaler assignment, clearing the pres-
caler is recommended before changing assignment.
The value of the prescaler is “unknown,” and assigning
a value that is less then the present value makes it dif-
ficult to take this unknown time into account.
CPUSTA, GLINTD ; Disable interrupt
CPUSTA, GLINTD ; Done, enable interrupt
MOVFP TMR0L,W
WRITING A 16-BIT VALUE TO TMR0
Prescaler Assignments
(Value = NT0)
Read TMR0L
PC+3
;
;
MOVFP TMR0L,W
(Value = NT0 +1)
New T0+1
PIC17C4X
Read TMR0L
PC+4
DS30412C-page 69
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