AT89LV51-12AC Atmel, AT89LV51-12AC Datasheet - Page 4

IC MICRO CTRL 12MHZ 44TQFP

AT89LV51-12AC

Manufacturer Part Number
AT89LV51-12AC
Description
IC MICRO CTRL 12MHZ 44TQFP
Manufacturer
Atmel
Series
89LVr
Datasheet

Specifications of AT89LV51-12AC

Core Processor
8051
Core Size
8-Bit
Speed
12MHz
Connectivity
UART/USART
Number Of I /o
32
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Peripherals
-
Other names
AT89LV5112AC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89LV51-12AC
Manufacturer:
CYPRESS
Quantity:
1 300
EA/V
External Access Enable. EA must be strapped to GND in
order to enable the device to fetch code from external pro-
gram memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be
internally latched on reset.
EA should be strapped to V
tions.
This pin also receives the 12-volt programming enable volt-
age (V
gramming is selected.
XTAL1
Input to the inverting oscillator amplifier and input to the
internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
Table 1. AT89LV51 SFR Map and Reset Values
4-48
0D8H
0D0H
0C8H
0C0H
0F8H
0F0H
0E8H
0E0H
0B8H
0B0H
0A8H
0A0H
98H
90H
88H
80H
PP
PP
) during Flash programming, when 12-volt pro-
XX000000
0X000000
00000000
00000000
00000000
00000000
11111111
11111111
00000000
11111111
00000000
11111111
T2CON
SCON
TCON
PSW
ACC
P3
P2
P1
P0
IP
IE
B
XXXXXXXX
XXXXXX00
00000000
00000111
T2MOD
TMOD
SBUF
CC
SP
for internal program execu-
Not
00000000
00000000
00000000
RCAP2L
DPL
TL0
00000000
00000000
00000000
RCAP2H
DPH
TL1
Special Function Registers
A map of the on-chip memory area called the Special Func-
tion Register (SFR) space is shown in Table 1.
Note that not all of the addresses are occupied, and unoc-
cupied addresses may not be implemented on the chip.
Read accesses to these addresses will in general return
random data, and write accesses will have an indetermi-
nate effect.
User software should not write 1s to these unlisted loca-
tions, since they may be used in future products to invoke
new features. In that case, the reset or inactive values of
the new bits will always be 0.
Timer 0 and 1
Timer 0 and Timer 1 in the AT89LV51 operate the same
way as Timer 0 and Timer 1 in the AT89C51.
00000000
00000000
TH0
TL2
00000000
00000000
TH2
TH1
0XXX0000
PCON
0FFH
0F7H
0EFH
0E7H
0DFH
0D7H
0CFH
0C7H
0BFH
0B7H
0AFH
0A7H
9FH
97H
8FH
87H

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