PIC18C658-E/PT Microchip Technology, PIC18C658-E/PT Datasheet - Page 285
![IC MCU OTP 16KX16 CAN 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18C658-E/PT
Manufacturer Part Number
PIC18C658-E/PT
Description
IC MCU OTP 16KX16 CAN 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C658E/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C658-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 285 of 366
- Download datasheet (7Mb)
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
LFSR
2000 Microchip Technology Inc.
After Instruction
Decode
Decode
FSR2H
FSR2L
Q1
Read literal
Read literal
Load FSR
[ label ]
0
0
k
None
The 12-bit literal ’k’ is loaded into
the file select register pointed to
by ’f’
2
2
LFSR FSR2, 0x3AB
’k’ MSB
’k’ LSB
1110
1111
Q2
=
=
f
k
FSRf
2
4095
0x03
0xAB
LFSR f,k
1110
0000
Process
Process
Data
Data
Q3
k
00ff
7
kkk
Advanced Information
’k’ to FSRfL
Write literal
literal ’k’
MSB to
FSRfH
Write
Q4
k
kkkk
11
kkk
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
REG
WREG
N
Z
REG
WREG
N
Z
Q1
register ’f’
Move f
[ label ]
0
d
a
f
N,Z
The contents of register ’f’ is moved
to a destination dependent upon
the status of ’d’. If 'd' is 0, the result
is placed in WREG. If 'd' is 1, the
result is placed back in register 'f'
(default). Location 'f' can be any-
where in the 256 byte Bank. If ’a’ is
0, the Access Bank will be
selected, overriding the BSR value.
If ’a’ is 1, the Bank will be selected
as per the BSR value.
1
1
MOVF
Read
0101
Q2
=
=
=
=
=
=
=
=
f
[0,1]
[0,1]
dest
PIC18CXX8
255
0x22
0xFF
?
?
0x22
0x22
0
0
REG, W
MOVF f [ ,d [,a] ]
00da
Process
Data
Q3
DS30475A-page 285
ffff
Write W
Q4
ffff
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