PIC16F76T-E/SO Microchip Technology, PIC16F76T-E/SO Datasheet - Page 210

IC MCU FLASH 8KX14 A/D 28SOIC

PIC16F76T-E/SO

Manufacturer Part Number
PIC16F76T-E/SO
Description
IC MCU FLASH 8KX14 A/D 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F76T-E/SO

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC16F76TE/SO
PICmicro MID-RANGE MCU FAMILY
14.5
DS31014A-page 14-8
PWM Mode
In Pulse Width Modulation (PWM) mode, the CCPx pin produces up to a 10-bit resolution PWM
output. Since the CCPx pin is multiplexed with the PORT data latch, the corresponding TRIS bit
must be cleared to make the CCPx pin an output.
Figure 14-3
For a step by step procedure on how to set up the CCP module for PWM operation, see Subsec-
tion
Figure 14-3: Simplified PWM Block Diagram
A PWM output
cycle). The frequency of the PWM is the inverse of the period (1/period).
Figure 14-4: PWM Output
Note:
14.5.3 “Set-up for PWM Operation.”
Note 1:
Timer2 Module
CCP Module
Clearing the CCPxCON register will force the CCPx PWM output latch to the default
low level. This is not the port I/O data latch.
shows a simplified block diagram of the CCP module in PWM mode.
(Figure
8-bit timer is concatenated with 2-bit internal Q clock or 2 bits of the prescaler to
create 10-bit time-base.
CCPRxH (Slave)
(DCxB9:DCxB2)
Comparator
CCPRxL
14-4) has a time-base (period) and a time that the output stays high (duty
Duty cycle registers
PR2
TMR2
Comparator
8
8
10
TMR2 = PR2 + 1, TMR2 forced to 0h
10
10
Duty Cycle =
DCxB9:DCxB0
(Note 1)
Period = PR2 + 1
Clear Timer, CCPx pin
and latch the Duty Cycle
TMR2 = Duty Cycle
CCPxCON<5:4>
(DCxB1:DCxB0)
TMR2 = PR2 + 1, TMR2 forced to 0h
R
S
Q
TRIS<y>
1997 Microchip Technology Inc.
CCPx

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