PIC16F871T-E/PT Microchip Technology, PIC16F871T-E/PT Datasheet - Page 73
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PIC16F871T-E/PT
Manufacturer Part Number
PIC16F871T-E/PT
Description
IC MCU CMOS 20MHZ 2K FLSH 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F870-ISO.pdf
(172 pages)
4.PIC16F870-ISO.pdf
(6 pages)
Specifications of PIC16F871T-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F871T-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F870-ISO PDF datasheet #3
- PIC16F870-ISO PDF datasheet #4
- Current page: 73 of 172
- Download datasheet (4Mb)
FIGURE 9-7:
FIGURE 9-8:
TABLE 9-7:
2003 Microchip Technology Inc.
0Bh, 8Bh,
10Bh,18Bh
0Ch
18h
1Ah
8Ch
98h
99h
Legend:
Note 1:
Address
RC7/RX/DT (pin)
Load RSR
Read
RCIF
Note:
RC7/RX/DT (pin)
Load RSR
Read
RCIF
Note:
x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for asynchronous reception.
Bits PSPIE and PSPIF are reserved on the PIC16F870; always maintain these bits clear.
INTCON
PIR1
RCSTA
RCREG
PIE1
TXSTA
SPBRG
This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (receive buffer)
because ADDEN was not updated and still = 0.
This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (receive buffer)
because ADDEN = 1.
Name
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
START
START
USART Receive Register
Baud Rate Generator Register
PSPIE
ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
PSPIF
bit
bit
CSRC
SPEN
Bit 7
GIE
bit0
bit0
(1)
(1)
Bit8 = 1, Address Byte
Bit8 = 0, Data Byte
PEIE
ADIF
ADIE
Bit 6
bit1
bit1
RX9
TX9
SREN
TXEN
RCIF
RCIE
Bit 5
T0IE
bit8
bit8
CREN ADDEN
SYNC
Bit 4
INTE
TXIF
TXIE
STOP
STOP
bit
bit
START
START
bit
bit
RBIE
Bit 3
—
—
—
Bit8 = 1, Address Byte
Bit8 = 0, Data Byte
bit0
bit0
CCP1IF TMR2IF TMR1IF 0000 -000
CCP1IE TMR2IE TMR1IE 0000 -000
BRGH
FERR
Bit 2
T0IF
bit8
bit8
OERR
TRMT
INTF
Bit 1
PIC16F870/871
STOP
STOP
bit
bit
Word 1
RCREG
Word 1
RCREG
RX9D
TX9D
Bit 0
R0IF
0000 000x
0000 0000
0000 -010
0000 0000
0000 000x
POR, BOR
Value on:
DS30569B-page 71
0000 -000
0000 000x
0000 0000
0000 -000
0000 -010
0000 0000
0000 000u
Value on
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