PIC16F872T-E/SS Microchip Technology, PIC16F872T-E/SS Datasheet - Page 82
![IC MCU CMOS 20MHZ 2K FLSH 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16F872T-E/SS
Manufacturer Part Number
PIC16F872T-E/SS
Description
IC MCU CMOS 20MHZ 2K FLSH 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F872-ISO.pdf
(168 pages)
5.PIC16F872-ISO.pdf
(5 pages)
6.PIC16F872-ISO.pdf
(6 pages)
Specifications of PIC16F872T-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F872-ISO PDF datasheet #4
- PIC16F872-ISO PDF datasheet #5
- PIC16F872-ISO PDF datasheet #6
- Current page: 82 of 168
- Download datasheet (3Mb)
PIC16F872
REGISTER 10-2:
DS30221C-page 80
bit 7
bit 6-4
bit 3-0
ADCON1 REGISTER (ADDRESS: 9Fh)
A = Analog input
D = Digital I/O
bit 7
ADFM: A/D Result Format Select bit
1 = Right justified. Six Most Significant bits of ADRESH are read as ‘0’.
0 = Left justified. Six Least Significant bits of ADRESL are read as ‘0’.
Unimplemented: Read as '0'
PCFG3:PCFG0: A/D Port Configuration Control bits:
Legend:
R = Readable bit
- n = Value at POR
PCFG3:
ADFM
PCFG0
Note 1: This column indicates the number of analog channels available as A/D inputs and
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
U-0
the number of analog channels used as voltage reference inputs.
AN4
RA5
U-0
—
A
A
A
A
D
D
D
A
A
A
A
A
D
D
D
V
V
V
V
V
V
V
V
V
AN3
RA3
R/W-0
REF
REF
REF
REF
REF
REF
REF
REF
REF
D
D
A
A
A
A
—
W = Writable bit
’1’ = Bit is set
+
+
+
+
+
+
+
+
+
V
V
V
V
V
AN2
RA2
REF
REF
REF
REF
REF
A
A
A
A
D
D
D
A
A
D
U-0
—
-
-
-
-
-
AN1
RA1
A
A
A
A
A
A
D
A
A
A
A
A
A
D
D
PCFG3
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
AN0
RA0
D
A
A
A
A
A
A
A
A
A
A
A
A
A
A
PCFG2
R/W-0
V
© 2006 Microchip Technology Inc.
RA3
RA3
RA3
RA3
RA3
RA3
RA3
RA3
RA3
V
V
V
V
V
V
REF
DD
DD
DD
DD
DD
DD
+
x = Bit is unknown
PCFG1
R/W-0
V
RA2
RA2
RA2
RA2
RA2
V
V
V
V
V
V
V
V
V
V
REF
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
-
PCFG0
Refs
C
R/W-0
HAN
8/0
7/1
5/0
4/1
3/0
2/1
0/0
6/2
6/0
5/1
4/2
3/2
2/2
1/0
1/2
(1)
bit 0
/
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