PIC16F876AT-E/SO Microchip Technology, PIC16F876AT-E/SO Datasheet - Page 122
![IC MCU FLASH 8KX14 W/AD 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC16F876AT-E/SO
Manufacturer Part Number
PIC16F876AT-E/SO
Description
IC MCU FLASH 8KX14 W/AD 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873A-ISO.pdf
(234 pages)
5.PIC16F873A-ISO.pdf
(6 pages)
6.PIC16F873A-ISO.pdf
(4 pages)
7.PIC16F873A-ISO.pdf
(6 pages)
8.PIC16F873A-ISO.pdf
(4 pages)
9.PIC16F873A-ISO.pdf
(22 pages)
Specifications of PIC16F876AT-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873A-ISO PDF datasheet #4
- PIC16F873A-ISO PDF datasheet #5
- PIC16F873A-ISO PDF datasheet #6
- PIC16F873A-ISO PDF datasheet #7
- PIC16F873A-ISO PDF datasheet #8
- PIC16F873A-ISO PDF datasheet #9
- Current page: 122 of 234
- Download datasheet (5Mb)
PIC16F87XA
FIGURE 10-7:
FIGURE 10-8:
TABLE 10-7:
DS39582B-page 120
0Bh, 8Bh,
10Bh,18Bh
0Ch
18h
1Ah
8Ch
98h
99h
Legend:
Note 1:
Address
RC7/RX/DT
RC7/RX/DT
Note:
Note:
Load RSR
Load RSR
Read
Read
RCIF
RCIF
(pin)
(pin)
x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Bits PSPIE and PSPIF are reserved on 28-pin devices; always maintain these bits clear.
This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (Receive Buffer)
because ADDEN was not updated and still = 0.
INTCON
PIR1
RCSTA
RCREG
PIE1
TXSTA
SPBRG
This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (Receive Buffer)
because ADDEN = 1.
Name
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
USART Receive Register
Baud Rate Generator Register
PSPIE
PSPIF
ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
Start
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
Start
bit
SPEN
CSRC
bit
Bit 7
GIE
bit 0
bit 0
(1)
(1)
Bit 8 = 1, Address Byte
ADIE
Bit 6
PEIE
ADIF
Bit 8 = 0, Data Byte
RX9
TX9
bit 1
bit 1
TMR0IE
SREN
TXEN
RCIE
RCIF
Bit 5
bit 8
bit 8
CREN ADDEN
SYNC
INTE
TXIF
TXIE
Bit 4
Stop
Stop
bit
bit
Start
Start
SSPIF
SSPIE
bit
RBIE
Bit 3
bit
—
Bit 8 = 1, Address Byte
Bit 8 = 0, Data Byte
bit 0
bit 0
TMR0IF
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE 0000 0000
BRGH
FERR
Bit 2
bit 8
bit 8
OERR
TRMT
INTF
Bit 1
Stop
Stop
bit
bit
Word 1
RCREG
Word 1
RCREG
RX9D
TX9D
Bit 0
R0IF
2003 Microchip Technology Inc.
0000 000x
0000 0000
0000 000x
0000 0000
0000 -010
0000 0000
POR, BOR
Value on:
0000 000u
0000 0000
0000 000x
0000 0000
0000 0000
0000 -010
0000 0000
Value on
all other
Resets
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