T89C51CC01CA-RLTIM Atmel, T89C51CC01CA-RLTIM Datasheet - Page 2

• Manufacturer Part Number: T89C51CC01CA-RLTIM
• Description: IC 8051 MCU FLASH 32K 44VQFP
• Manufacturer: Atmel
• Series: AT89C CANr

Specifications of T89C51CC01CA-RLTIM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• For Use With: AT89STK-06 - KIT DEMOBOARD 8051 MCU W/CAN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: T89C51CC01CARLTIM

4. Movc Instruction on Boot Memory from Boot Memory Does Not Work
5. Power OFF Flag
6. CAN – Lost CAN Error Interrupt
7. Timer 2 – Baud Rate Generator – No IT When TF2 is Set by Software
8. Timer 2 – Baud Rate Generator – Long Start Time
9. UART – RB8 Lost with JBC on SCON Register
10. ADC – Interrupt Controller/ADC Idle Mode/Loops In High Priority Interrupt
2
Workaround
The workaround is to clear IEx bit in Interrupt subroutine.
INT1_ISR :
CLR IE1
....
No movc instruction is performed when a program running on the boot memory tries to read its own code using a movc
instruction.
Workaround
None.
Power OFF Flag does not work.
Workaround
None.
When a stuff error occurs during a CAN frame transmission on DPRAM write access, the controller does not generate
the error interrupt and any received frame can generate a Receive interrupt.
Workaround
None.
When Timer 2 is used in baud rate generator mode, setting TF2 by software does not generate an interrupt.
Workaround
Use Timer 1 instead of Timer 2 to generate baud rate and interrupt.
When Timer 2 is used as a baud rate generator, TH2 is not loaded with RCAP2H at the beginning, then UART is not
operational before 10000 machine cycles.
Workaround
Add the initialization of TH2 and TL2 in the initialization of Timer 2.
May lose RB8 value, if RB8 changes from 1 to 0 during JBC instruction on SCON register.
Workaround
Clear RB8 at the beginning of the code and after each time it goes to 1.
The problem occurs during an A/D conversion in idle mode,If a hardware interrupt occurs followed by a second inter-
rupt with higher priority before the end of the A/D conversion. If the above configuration occurs, the highest priority
interrupt is served immediately after the A/D conversion. At the end of the highest priority interrupt service, the proces-
sor will not serve the hardware reset interrupt pending. It will also not serve any new interrupt requests with a priority
lower than the high level priority last served.
T89C51CC01 Errata Sheet
; Interrupt sub routine
4131J–CAN–05/06