T89C51CC01CA-RLTIM Atmel, T89C51CC01CA-RLTIM Datasheet - Page 42
T89C51CC01CA-RLTIM
Manufacturer Part Number
T89C51CC01CA-RLTIM
Description
IC 8051 MCU FLASH 32K 44VQFP
Manufacturer
Atmel
Series
AT89C CANr
Datasheets
1.T89C51CC01CA-7CTIM.pdf
(167 pages)
2.T89C51CC01CA-7CTIM.pdf
(12 pages)
3.T89C51CC01CA-7CTIM.pdf
(32 pages)
4.T89C51CC01CA-7CTIM.pdf
(29 pages)
Specifications of T89C51CC01CA-RLTIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
AT89STK-06 - KIT DEMOBOARD 8051 MCU W/CAN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
T89C51CC01CARLTIM
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Flash Protection from Parallel
Programming
Preventing Flash Corruption
42
A/T89C51CC01
Figure 24. Reading Procedure
Note:
The three lock bits in Hardware Security Byte (see "In-System-Programming" section)
are programmed according to Table 27 provide different level of protection for the on-
chip code and data located in FM0 and FM1.
The only way to write these bits are the parallel mode. They are set by default to level 4
Table 27. Program Lock bit
Program Lock bits
U: unprogrammed
P: programmed
WARNING: Security level 2 and 3 should only be programmed after Flash and Core
verification.
See the “Power Management” section.
Security
Level
1
2
3
4
Program Lock Bits
1. aa = 10 for the Hardware Security Byte.
LB0
U
P
U
U
LB1
U
U
P
U
LB2
U
U
U
P
Protection Description
No program lock features enabled. MOVC instruction executed from
external program memory returns non coded data.
MOVC instructions executed from external program memory are barred
to return code bytes from internal memory, EA is sampled and latched
on reset, and further parallel programming of the Flash is disabled.
Same as 2, also verify through parallel programming interface is
disabled.
Same as 3, also external execution is disabled if code roll over beyond
7FFFh
Exec: MOVC A, @A+DPTR
Flash Spaces Reading
Flash Spaces Mapping
FCON = 0000aa0b
DPTR = Address
FCON = 00h
Clear Mode
Data Read
ACC = 0
(1)
4129N–CAN–03/08
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