AT87F51RC-24PC Atmel, AT87F51RC-24PC Datasheet
AT87F51RC-24PC
Specifications of AT87F51RC-24PC
Related parts for AT87F51RC-24PC
AT87F51RC-24PC Summary of contents
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... Power-off Flag Description The AT87F51RC is a low-power, high-performance CMOS 8-bit microcomputer with 32K bytes of QuickFlash one-time programmable (OTP) read only memory and 512 bytes of RAM. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 and 80C52 instruction set and pinout ...
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... A total of 512 bytes of internal RAM are avail- able in the AT87F51RC. The 256-byte expanded internal RAM is accessed via MOVX instructions after clearing bit 1 in the SFR located at address 8EH. The other 256-byte RAM segment is accessed the same way as the Atmel ...
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... Port 3 pins that are externally being pulled low will source current (I ) because of the pullups. IL Port 3 also serves the functions of various special features of the AT87F51RC, as shown in the following table. Port 3 also receives some control signals for QuickFlash programming and verification. Port Pin Alternate Functions P3 ...
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... PSEN Program Store Enable is the read strobe to external pro- gram memory. When the AT87F51RC is executing code from external pro- gram memory, PSEN is activated twice each machine Table 1. AT87F51RC SFR Map and Reset Values 0F8H ...
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Special Function Registers A map of the on-chip memory area called the Special Func- tion Register (SFR) space is shown in Table 1. Note that not all of the addresses are occupied, and unoc- cupied addresses may not be implemented ...
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... Bit 7 – Reserved for future expansion DPS Data Pointer Register Select DPS 0 Selects DPTR Registers DP0L, DP0H 1 Selects DPTR Registers DP1L, DP1H AT87F51RC 6 – – WDIDLE DISRTO value before accessing the respective Data Pointer Regis- ter. Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to “ ...
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... FFFFH are to external memory. Data Memory The AT87F51RC has internal data memory that is mapped into four separate segments: the lower 128 bytes of RAM, upper 128 bytes of RAM, 128 bytes special function regis- ter (SFR) and 256 bytes expanded RAM (ERAM). ...
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... December 1997 Microcontroller Data Book, page 2-48, section titled, “Serial Interface”. Timer 0 and 1 Timer 0 and Timer 1 in the AT87F51RC operate the same way as Timer 0 and Timer 1 in the AT87F51 and AT87F52. Timer 2 Timer 16-bit Timer/Counter that can operate as either a timer or an event counter ...
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Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transi- tion, the maximum count rate is 1/24 of the oscillator fre- quency. To ensure that a given level is sampled at least ...
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... Not Bit Addressable – – Bit 7 6 Symbol Function – Not implemented, reserved for future T2OE Timer 2 Output Enable bit. DCEN When set, this bit allows Timer configured as an up/down counter. AT87F51RC 10 C/ CONTR OL TR2 C/ RELO AD RCAP2H CONTROL EXEN2 – – – 5 ...
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Figure 4. Timer 2 Auto Reload Mode (DCEN = 1) OSC PIN Figure 5. Timer 2 in Baud Rate Generator Mode NOTE: OSC. FREQ. IS DIVIDED BY 2, NOT 12 ÷ 2 ...
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... Figure 6. Timer 2 in Clock-Out Mode OSC P1.0 (T2) TRANSITION DETECTOR P1.1 (T2EX) AT87F51RC 12 increments every state time (at 1/2 the oscillator fre- quency). The baud rate formula is given below. Modes 1 and 3 -------------------------------------- - Baud Rate where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned integer. ...
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... Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once. Note that Table 5 shows that bit position IE.6 is unimple- mented. In the AT87F51RC, bit position IE.5 is also unim- plemented. User software should not write 1s to these bit positions, since they may be used in future AT89 products. ...
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... Mode Program Memory Idle Internal Idle External Power-down Internal Power-down External AT87F51RC 14 its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. Figure 8. Oscillator Connections Note: C1 for Crystals Figure 9. External Clock Drive Configuration EXTERNAL OSCILLATOR ...
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... Program Memory Lock Bits The AT87F51RC has three lock bits that can be left unpro- grammed (U) or can be programmed (P) to obtain the addi- tional features listed in the following table. Table 8. Lock Bit Protection Modes Program Lock Bits LB1 LB2 LB3 Protection Type ...
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... A14 A14 OUT D2 1EH 87H 07H X AT87F51RC ADDR. P1.0-P1 A13 P2.0 - P2.5 P3.4 A14* P2.6 P2.7 ALE P3.3 P3.6 P3.7 XTAL 2 EA XTAL1 RST GND PSEN P2.5-0 P1.7-0 Address A13-8 A7-0 A13-8 A7 000H X 100H X 200H +5V CC PGM DATA P0 (USE 10K PULLUPS) ...
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QuickFlash Programming and Verification Characteristics T = 0°C to 70° 5.0 ± 10 Symbol Parameter V Programming Supply Voltage PP I Programming Supply Current Supply Current CC CC 1/t Oscillator Frequency CLCL t ...
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... OL Port Ports Maximum total I for all output pins exceeds the test condition than the listed test conditions. 2. Minimum V for Power-down is 2V. CC AT87F51RC 18 *NOTICE: = -40°C to 85°C and V = 5.0V ± 20%, unless otherwise noted Condition (Except EA) (Except XTAL1, RST) (XTAL1, RST 1 ...
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AC Characteristics Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load capacitance for all other outputs = 80 pF. External Program and Data Memory Characteristics Symbol Parameter 1/t Oscillator Frequency CLCL t ALE Pulse ...
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... External Program Memory Read Cycle ALE PSEN PORT 0 PORT 2 External Data Memory Read Cycle ALE PSEN RD PORT FROM RI OR DPL PORT 2 AT87F51RC 20 t LHLL t t AVLL LLIV t LLPL t PLIV t PLAZ t LLAX t PXIX INSTR IN t AVIV A8 - A15 t LHLL t LLDV t RLRH t LLWL t LLAX ...
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External Data Memory Write Cycle ALE PSEN WR PORT 0 PORT 2 External Clock Drive Waveforms V - 0.5V CC 0 0.45V External Clock Drive Symbol Parameter 1/t Oscillator Frequency CLCL t Clock Period CLCL t ...
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... AC Testing Input/Output Waveforms V - 0. TEST POINTS 0 0.45V Note Inputs during testing are driven at V for a logic 1 and 0.45V for a logic 0. Timing mea- surements are made at V max. for a logic 0. AT87F51RC 22 = 5.0V 20% and Load Capacitance = 80 pF MHz Osc Min 1.0 700 XLXL t ...
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... Ordering Code AT87F51RC-12AC AT87F51RC-12JC AT87F51RC-12PC AT87F51RC-12AI AT87F51RC-12JI AT87F51RC-12PI AT87F51RC-16AC AT87F51RC-16JC AT87F51RC-16PC AT87F51RC-16AI AT87F51RC-16JI AT87F51RC-16PI AT87F51RC-20AC AT87F51RC-20JC AT87F51RC-20PC AT87F51RC-20AI AT87F51RC-20JI AT87F51RC-20PI AT87F51RC-24AC AT87F51RC-24JC AT87F51RC-24PC AT87F51RC-24AI AT87F51RC-24JI AT87F51RC-24PI Package Type Package Operation Range 44A Commercial 44J ( 40P6 44A Industrial 44J (- 40P6 44A Commercial 44J ( ...
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... MAX SEATING PLANE .161(4.09) .125(3.18) .065(1.65) .110(2.79) .041(1.04) .090(2.29) .630(16.0) .590(15.0) .012(.305) .008(.203) .690(17.5) .610(15.5) AT87F51RC 24 44J, 44-lead, Plastic J-Leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) 12.21(0.478) SQ 11.75(0.458) 0.45(0.018) 0.30(0.012) .032(.813) .026(.660) .050(1.27) TYP 10.10(0.394) SQ 9.90(0.386) 1 ...
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