PIC18F4320T-E/PT Microchip Technology, PIC18F4320T-E/PT Datasheet - Page 341
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PIC18F4320T-E/PT
Manufacturer Part Number
PIC18F4320T-E/PT
Description
IC MCU FLASH 4KX16 EEPROM 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18F1320-ISS.pdf
(36 pages)
4.PIC18F2220-ISO.pdf
(394 pages)
5.PIC18F2220-ISO.pdf
(6 pages)
6.PIC18F2220-ISO.pdf
(6 pages)
7.PIC18F2220-ISO.pdf
(8 pages)
8.PIC18F2220-ISO.pdf
(6 pages)
9.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18F4320T-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18F1320-ISS PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- PIC18F2220-ISO PDF datasheet #8
- PIC18F2220-ISO PDF datasheet #9
- Current page: 341 of 394
- Download datasheet (7Mb)
TABLE 26-17: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
FIGURE 26-17:
© 2007 Microchip Technology Inc.
70
71
71A
72
72A
73A
74
75
76
77
78
79
80
82
83
Note 1:
Param
No.
SCL
SDA
Note:
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
TscH2ssH,
TscL2ssH
SC
SC
SS
SS
SC
SC
SC
SC
SS
SC
SC
SS
B
DO
DO
Symbol
Requires the use of Parameter # 73A.
Only if Parameter # 71A and # 72A are used.
Refer to Figure 26-5 for load conditions.
2
H2
L2
L2
L2
H
L
H2
L2
H2
R
F
L2
B
R
F
DO
SC
SC
DO
DI
DO
DI
DO
L
L,
H,
L
V
V SDO Data Output Valid after SS ↓
V,
Z SS↑ to SDO Output High-Impedance
90
SS ↓ to SCK ↓ or SCK ↑ Input
SCK Input High Time
(Slave mode)
SCK Input Low Time
(Slave mode)
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time
(Master mode)
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK
Edge
Edge
SS ↑ after SCK edge
I
2
Condition
C™ BUS START/STOP BITS TIMING
Start
91
Characteristic
PIC18F2220/2320/4220/4320
Continuous
Single Byte
Continuous
Single Byte
PIC18FXX20
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
1.25 T
1.25 T
1.5 T
Min
T
100
CY
10
CY
40
40
—
—
—
—
—
—
—
—
—
CY
CY
CY
+ 40
+ 40
+ 30
+ 30
92
Condition
Stop
Max Units Conditions
100
100
—
—
—
—
—
—
—
25
45
25
50
25
45
25
50
50
—
93
DS39599G-page 339
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
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